Some features of different Isa

Source: Internet
Author: User

Usually the bytecode length of the x86 architecture is not fixed, and x64 also follows this practice.

The ARM architecture is a fixed-length byte code.

At the very beginning, all arm instructions were encoded as 4 bytes. This is called arm mode.

Later discovery can be compressed to two bytes. This is called thumb mode

* Thumb mode and arm mode may be present in one program at the same time.

In the ARMV7, another thumb-2.thumb-2 was added to the Thumb with some 4-byte length instructions.

ARM64 's machine code is 4 bytes long.

* Many other RISC ISAs with fixed length 32-bit opcodes, such as MIPS, PowerPC and Alpha AXP.

------------------Original---------------------

The x86 ISA have always been one with variable-length opcodes, so when the 64-bit era came, the x64 extensions does not Impa CT the ISA very significantly. In fact, the x86 ISA still contains a lot of instructions so first appeared in 16-bit 8086 CPU, yet is still found in t He CPUs of today. ARM is a RISC3 CPU designed with constant-length opcode on mind, which had some advantages in the past. In the very beginning, all ARM instructions were encoded in 4 bytes4. This was now referred to as "ARM mode". Then they thought it wasn ' t as frugal as they first imagined. In fact, most used CPUs INSTRUCTIONS5 in real world applications can be encoded using less information. They therefore added another ISA, called Thumb, where each instruction is encoded in just 2 bytes. This was now referred as "Thumb mode". However, not all ARM instructions can being encoded in just 2 bytes, so the Thumb instruction set is somewhat limited. It is worth noting that code compiled for ARM mode and Thumb mode may of COUrse coexist within one single program. The ARM creators thought Thumb could is extended, giving rise to Thumb-2, which appeared in ARMv7. Thumb-2 still uses 2-byte instructions, but had some new instructions which has the size of 4 bytes. There is a common misconception this Thumb-2 is a mix of ARM and Thumb. This is incorrect. Rather, Thumb-2 was extended to fully support all processor features so it could compete with ARM mode-a goal this was CL Early achieved, as the majority of applications for Ipod/iphone/ipad is compiled for the Thumb-2 instruction set (Admitte Dly, largely due to the fact of Xcode does this by default). Later the 64-bit ARM came out. This ISA have 4-byte opcodes, and lacked the need of any additional Thumb mode. However, the 64-bit requirements affected the ISA, resulting in US now has three ARM instruction Sets:arm mode, Thumb Mode (including Thumb-2) and ARM64. These ISAs intersect partially, but it can is said that they is different ISAs, rather thanVariations of the same one. Therefore, we would try to add fragments of the code in all three ARM ISAs in the This book. There is, by the the-the-many other RISC ISAs with fixed length 32-bit opcodes, such as MIPS, PowerPC and Alpha axp. 

Some features of different Isa

Contact Us

The content source of this page is from Internet, which doesn't represent Alibaba Cloud's opinion; products and services mentioned on that page don't have any relationship with Alibaba Cloud. If the content of the page makes you feel confusing, please write us an email, we will handle the problem within 5 days after receiving your email.

If you find any instances of plagiarism from the community, please send an email to: info-contact@alibabacloud.com and provide relevant evidence. A staff member will contact you within 5 working days.

A Free Trial That Lets You Build Big!

Start building with 50+ products and up to 12 months usage for Elastic Compute Service

  • Sales Support

    1 on 1 presale consultation

  • After-Sales Support

    24/7 Technical Support 6 Free Tickets per Quarter Faster Response

  • Alibaba Cloud offers highly flexible support services tailored to meet your exact needs.