stm32-external interrupt, no hardware interference is happy

One: Trigger mode

The external interrupt of the STM32 is triggered by the edge, and the level trigger is not supported;

Two: External interrupt grouping

Each gpio of the STM32 can be configured as an external interrupt trigger source, STM32 by dividing many interrupt trigger sources into groups according to the PIN's sequence number, such as: Pa0,pb0,pc0,pd0,pe0,pf0,pg0 for the first group, and so on, We can draw a total of 16 groups, STM32 rules, each group can only have one interrupt trigger source work, then, the maximum work is 16 external interrupts.

STM32 grouping and corresponding interrupt handling function assignments:

Pin	Interrupt Flag	Interrupt Handling function Assignment
Pa0~pg0	EXTI0	Exti0_irqhandler
Pa1~pg1	EXTI1	Exti1_irqhandler
Pa2~pg2	EXTI2	Exti2_irqhandler
Pa3~pg3	EXTI3	Exti3_irqhandler
Pa4~pg4	EXTI4	Exti4_irqhandler
Pa5~pg5	EXTI5	Exti9_5_irqhandler
Pa6~pg6	EXTI6
Pa7~pg7	EXTI7
Pa8~pg8	EXTI8
Pa9~pg9	EXTI9
Pa10~pg10	EXTI10	Exti15_10_irqhandler
Pa11~pg11	EXTI11
Pa12~pg12	EXTI12
Pa13~pg13	EXTI13
Pa14~pg14	EXTI14
Pa15~pg15	EXTI15

Third: The configuration process of external interrupts

L Configuration Trigger Source-gpio

The trigger source is input via the Gpio port, so to configure the GPIO mode, the input method has the following types:

1. Gpio_mode_ain, Analog input (ADC analog input, or low power saving)

2. gpio_mode_in_floating, floating air input

3. GPIO_MODE_IPD = 0x28, with pull-down input

4. Gpio_mode_ipu = 0x48, with pull-up output -----------------------Specific configuration examples-----------------------Reference STM32 's library function version of the self-with routines PB5 the corresponding Exti9_5_irqhandler, and the disconnection in number 5th,This can't be set up, otherwise it won't work. void Extix_init (void)
{Gpio_inittypedef gpio_initstructure;
Exti_inittypedef exti_initstructure;
Nvic_inittypedef nvic_initstructure;     Gpio_pinremapconfig (gpio_remap_swj_jtagdisable, ENABLE); Turn off Jtag rcc_apb2periphclockcmd ( Rcc_apb2periph_gpiob| rcc_apb2periph_afio,enable); Gpio_initstructure.gpio_pin = gpio_pin_5;
Gpio_initstructure.gpio_mode = Gpio_mode_ipu;
Gpio_init (Gpiob, &gpio_initstructure); Gpio_extilineconfig (GPIO_PORTSOURCEGPIOB,GPIO_PINSOURCE5);

Exti_initstructure.exti_line= Exti_line5;
Exti_initstructure.exti_mode = Exti_mode_interrupt;
Exti_initstructure.exti_trigger = exti_trigger_falling;
Exti_initstructure.exti_linecmd = ENABLE;
Exti_init (&exti_initstructure); Nvic_initstructure.nvic_irqchannel = exti9_5_irqn; External interrupt channel where the key can be enabled
nvic_initstructure.nvic_irqchannelpreemptionpriority = 0x02; First priority 4-bit, total 16 levels
nvic_initstructure.nvic_irqchannelsubpriority = 0x01; Priority 0-bit first, 4-bit from the priority level
Nvic_initstructure.nvic_irqchannelcmd = ENABLE; Enable external interrupt Channel
Nvic_init (&nvic_initstructure); } processing function, to clear the interrupt flag bit, or a second m-time interrupt may void Exti9_5_irqhandler (void)
{
Delay_ms (10); // Shake, it's the key, you need it here, or you don't have to delay .
printf ("delay_ms\r\n");

if (Exti_getitstatus ( Exti_line5)! = RESET)
{ //Actions to be implemented by oneself
printf ("exti0_irqhandler\r\n");
}
Exti_clearitpendingbit ( Exti_line5); Clear EXTI13 line suspend bit

}

stm32-external interrupt, no hardware interference is happy