STM32 Start-Up process analysis

First, start mode, determine the position of the vector table

When the CPU is power up, first the code area (Flash) should start from the address of 0x00000000, and the data area (SRAM) should start from 0x20000000, the CORTEX-M3 CPU always obtains the reset vector through the code area. A special mechanism is used in the STM32F10XXX microprocessor to enable STM32 to be launched not only by Flash (primary flash and system Flash), but also from SRAM.

STM32 has the following 3 ways to start:

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Refer to the following memory map for main Flash/system Memory/sram:

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As can be seen between 0x00000000-0x08000000 this 128M space is reserved, this area is called Boot Memory space (aliased to Flash or systen memory depending on BOOT pins ）。

(1) Boot from main flash: Boot Space is the alias of Main Flash. In the case of 0x08000000 corresponding memory, the block memory can either be manipulated via 0x00000000 or 0x08000000, and both are the same piece of memory for the operation

(2) booting from system memory: Boot Space is the alias of system memory. In the case of 0x1ffffff0 corresponding memory, the block memory can either be manipulated via 0x00000000 or 0X1FFFFFF0, and both are the same piece of memory for the operation

(3) Start from SRAM: SRAM can only be operated by 0x20000000, which is different from the above. when booting from SRAM, you need to re-set the position of the vector table in the application initialization code.

Eg:void systeminit (void)

{

... #ifdef Vect_tab_sram

Scb->vtor = Sram_base | Vect_tab_offset; /* Vector Table relocation in Internal SRAM. */#elseSCB->vtor = Flash_base | Vect_tab_offset; /* Vector Table relocation in Internal flash.*/#endif

}

Second, vector table parsing

Analysis of STM32 startup files Startup_stm32f10x_hd.s (bulk) did the following things mainly:

(1) Setting the initial stack pointer (SP)

(2) Set the initial program counter (PC) as the reset vector and initialize the system clock before executing the main function

(3) Set the ingress address of the vector table entry to the exception event

(4) After reset processor is thread mode, priority is privileged, stack is set to MSP main stack

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Third, the actual operation of the boot process

Simulation of the emulator, found that the program will jump directly to Reset_handler, from the. map file to see Reset_handler address is 0x080003a5 is not 0x08000000 (because this is started from Flash, So it should be 0x08000000). So how did STM32 transition from 0x08000000 to 0X080003A5?

View the corresponding description in the reset sequence in the Chinese version of the cortex-m3 authoritative guide:

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In other words, when the power-on reset, the beginning of the CPU's initiative is still in the CM3. CM3 performs the initialization of registers and takes the reset vector table and executes!

The majority of the microcontroller, the traditional arm architecture always start from 0 address, and the 0 address is a jump instruction. The location of the MSP is stored in the CM3 0 address, which is not an execution instruction but a data table.

There is another problem, how to enter the reset sequence?

The triggering STM32 enters the reset sequence with the following conditions:

(1) System Reset

(2) Power reset

(3) Backup domain reset

When power is on, it is through power reset to enter the reset sequence!

STM32 Start-up process analysis