STM32F103ZET6 output a specific number of PWM (reprinted) with timer Cascade

Stm32f103zet6 in a total of 8 timers, including advanced Timers TIM1-TIM5, TIM8, a total of 6.

There is a need to use the CASCADE function of the timer, the ST's RM0008 REV12 P388 and P399 page is explained for the specific timer, how to choose the Cascade function, see table 86.

Here I output PWM timer is TIM2, idle timer is TIM3. With TIM2 as the main timer, TIM3 counts the number of output pulses from the timer to TIM2. Check table shows that TIM3 to choose TIM2 from the timer as the trigger source, the need to configure ts=001, that is, select ITR1.

the ability to control the number of output PWM via a timer can be configured as follows:




void Tim2_master__tim3_slave_configuration (u32 pulsefrequency)
{
tim_timebaseinittypedef tim_timebasestructure;
tim_ocinittypedef tim_ocinitstructure;

U16 Npdtemp;
    /* -----------------------------------------------------------------------
timx configuration:generate 4 PWM signals with 4 different duty cycles:
TIMXCLK = Prescaler = 0x0, timx counter clock = MHz
timx arr Register = 0 = timx Frequency = timx counter clock/(arr + 1)
timx Frequency = 72MHz.
    ----------------------------------------------------------------------- */
tim_cmd (TIM2, DISABLE);
npdtemp = 72000000ul/pulsefrequency;

//Timing configuration: Configure PWM output Timer--tim2
/ * Time Base configuration * /
tim_timebasestructure.tim_period = nPDTemp-1;
tim_timebasestructure.tim_prescaler = 0;
tim_timebasestructure.tim_clockdivision = 0;
tim_timebasestructure.tim_countermode = tim_countermode_up;
tim_timebasestructure.tim_repetitioncounter = 0;
Tim_timebaseinit (TIM2, &tim_timebasestructure);

    
//Output configuration: Configure PWM output Timer--tim2
/ * PWM1 Mode configuration:channel1 * /
tim_ocinitstructure.tim_ocmode = tim_ocmode_pwm1;
tim_ocinitstructure.tim_ocpolarity = Tim_ocpolarity_high;
tim_ocinitstructure.tim_outputstate = tim_outputstate_enable;
Tim_ocinitstructure.tim_pulse = npdtemp>>1;//50%

Tim_oc1init (TIM2, &tim_ocinitstructure);
tim_oc1preloadconfig (TIM2, tim_ocpreload_enable);
    
//Base-timer configuration: Configure Pulse count Register--TIM3
tim_timebasestructure.tim_period = 0xFFFF;
Tim_timebasestructure.tim_prescaler = 1;
tim_timebasestructure.tim_clockdivision = 0;
tim_timebasestructure.tim_countermode = tim_countermode_up;
tim_timebasestructure.tim_repetitioncounter = 0;
Tim_timebaseinit (TIM3, &tim_timebasestructure);
    
/ * Output Compare Active Mode configuration:channel1 * /
tim_ocinitstructure.tim_ocmode = tim_ocmode_inactive;
tim_ocinitstructure.tim_ocpolarity = Tim_ocpolarity_high;
tim_ocinitstructure.tim_outputstate = tim_outputstate_enable;
tim_ocinitstructure.tim_pulse = 0xFFFF; The configuration value here is of little significance.
    
Tim_oc1init (TIM3, &tim_ocinitstructure);
    
//configuration TIM2 main timer
/ * Select the Master Slave Mode * /
Tim_selectmasterslavemode (TIM2, tim_masterslavemode_enable);
/ * Master Mode selection * /
Tim_selectoutputtrigger (TIM2, tim_trgosource_update);
    
//Configure TIM3 for slave timer
/ * Slave Mode selection:tim3 * /
Tim_selectslavemode (TIM3, tim_slavemode_gated);
Tim_selectinputtrigger (TIM3, tim_ts_itr1);
    
tim_itconfig (TIM3, TIM_IT_CC1, ENABLE);
   
tim_cmd (TIM2, DISABLE);
tim_cmd (TIM3, DISABLE);
}

The Interrupt Service program is as follows:


U8 tim2_pulse_tim3_counter_ok = 0;
void Tim3_irqhandler (void)
{
if (Tim_getitstatus (TIM3, tim_it_cc1)! = RESET)
    {
tim_clearitpendingbit (TIM3, TIM_IT_CC1); Clear interrupt Flag bit
        
tim_cmd (TIM2, DISABLE);//Off Timer
tim_cmd (TIM3, DISABLE);//Off Timer
        
TIM2_PULSE_TIM3_COUNTER_OK = 1;
    }
}

the application is:

u16 pulsecnt = 10000;
void Main (void)
{
Systemsetup (); Initializing Cores and peripherals
tim2_master__tim3_slave_configuration (10000);//configuration TIM2 pulse output is 10k
While (1)
    {
tim_itconfig (TIM3, TIM_IT_CC1, DISABLE); /* TIM Enable counter * /
tim_cmd (TIM3, ENABLE);
TIM3->CCR1 = pulsecnt;
tim3->cnt = 0;
tim_itconfig (TIM3, TIM_IT_CC1, ENABLE);
tim_cmd (TIM2, ENABLE); /* TIM Enable counter * /
        
while (Tim2_pulse_tim3_counter_ok = = 0);
    }
}


This configuration, using the TIM3 of the comparison interrupt, I have not tried other ways, I think it should be possible, such as the timer update interrupt ...

STM32F103ZET6 output a specific number of PWM (reprinted) with timer Cascade