stm32f407 RCC Clock Configuration

Source: Internet
Author: User

The new start-up project requires the use of stm32f407, who likes to set the system clock with the library function when using the STM32F1 series, so F4 also intends to do so, but encounters some problems.

Which Baidu Library has an article about RCC's article will be good, address: Http://wenku.baidu.com/link?url=6mbgKXNIhl4XGqnvp0GzCweLVfldIjzDUMo90lfcKx1YwC7d-3JX _s20ntl3ujpkqya5jhhf-wta6mthmwx6jzd8ks674sx7cdc0tgrcpx3

I used the same function, but I added some of the content inside.

Set stm32f407 sysclk rcc_pllconfig (Rcc_pllsource_hse, Pll_m, Pll_n, pll_p, pll_q);

wherein, the input clock of the PLL_M:PLL VCO, the range 1~2m

PLL_N:PLL VCO output clock between 192 and 432 MHz

PLL_P:PLL VCO divide number, must be {2, 4, 6, or 8}, this crossover as SYSCLK

PLLQ:OTG FS, SDIO and rng divide number, between 4 and 15 and, if using USB OTG FS, then this crossover comment <=48mhz

There are also two calculation formulas.

Pll_vco = (Hse_value or hsi_value/pll_m) * Pll_n

Sysclk=pll_vco/pll_p

USB OTG FS, SDIO and RNG Clock = pll_vco/pllq

Based on the above, we can quickly fix the stm32f407 system to be able to clock. For example, the external crystal oscillator is 8MHZ, want to get 72M, then pll_m=8,pll_n=288,pll_p=4 can be obtained. Pllq=6

stm32f407 RCC Clock Configuration

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