STM32F407 Serial DMA Transceiver data----Learn to post _ Single-chip microcomputer

Hardware platform: stm32f407

Library files: stm32f4xx_dsp_stdperiph_lib_v1.6.1

Serial: USART6 TX & RX

STM32F4 has two DMA controllers, mounted on the AHB bus, each DMA controller has eight stream, each stream has eight channel.

A channel can use more than one stream at a time, and a stream cannot use multiple channel at the same time.

Send data:

1. When the DMA sends the energy, and the data buffer has the data, sends the data

2.DMA send complete after sending complete interrupt, need to clear send completion flag bit, if you do not need to send data again, you need to close the Send channel

3. Re-write data to the data buffer, open the Send channel for the next send

Receive data:

When the DMA is configured, the peripheral data enters the receiving data buffer and waits for the receiving data. When the data flow is interrupted, serial port idle interrupt is generated. At this point, you need to close the associated receive channel, clear the receive flag bit, and read the received data. Open channel wait for next receive (Request DMA receive once)

Gpio initialization:

USART6 PC6 PC7
	rcc_ahb1periphclockcmd (rcc_ahb1periph_gpioc,enable);
	Gpio. Gpio_mode = GPIO_MODE_AF;
	Gpio. Gpio_otype = Gpio_otype_od;
	Gpio. GPIO_PUPD = Gpio_pupd_nopull;
	Gpio. Gpio_speed = Gpio_speed_25mhz;
	Gpio. Gpio_pin = gpio_pin_6| gpio_pin_7;
	Gpio_init (Gpioc,&gpio);
	Gpio_pinafconfig (GPIOC,GPIO_PINSOURCE6,GPIO_AF_USART6);
	Gpio_pinafconfig (GPIOC,GPIO_PINSOURCE7,GPIO_AF_USART6);

Serial Port initialization:

Rcc_apb2periphclockcmd (rcc_apb2periph_usart6,enable);
	 Usart. Usart_baudrate = 115200;
	 Usart. Usart_hardwareflowcontrol = Usart_hardwareflowcontrol_none;
	 Usart. Usart_mode = Usart_mode_tx | USART_MODE_RX;
	 Usart. usart_parity = Usart_parity_no;
	 Usart. Usart_stopbits = Usart_stopbits_1;
	 Usart. Usart_wordlength = usart_wordlength_8b;
	 Usart_init (Usart6,&usart);
	 Usart_cmd (usart6,enable);
	 Usart_itconfig (USART6, Usart_it_idle, ENABLE);

DMA initialization:

  Dma_deinit (DMA2_STREAM1);

  Dma_deinit (DMA2_STREAM6);//Set stream to Default dma_initstructure.dma_peripheralbaseaddr = (uint32_t) (&USART6->DR
  );
  Dma_initstructure.dma_buffersize = 8;
  Dma_initstructure.dma_peripheralinc = dma_peripheralinc_disable;
  Dma_initstructure.dma_memoryinc = dma_memoryinc_enable;
  Dma_initstructure.dma_peripheraldatasize = Dma_peripheraldatasize_halfword;
  Dma_initstructure.dma_memorydatasize = Dma_memorydatasize_halfword;
  Dma_initstructure.dma_mode = Dma_mode_normal;
  dma_initstructure.dma_priority = Dma_priority_high;         
  Dma_initstructure.dma_fifomode = dma_fifomode_enable;
  Dma_initstructure.dma_fifothreshold = Dma_fifostatus_full;
  Dma_initstructure.dma_memoryburst = Dma_memoryburst_single;
	
Dma_initstructure.dma_peripheralburst = Dma_peripheralburst_single; 
  USART6 DMA Collection Dma_initstructure.dma_channel = dma_channel_5;
  Dma_initstructure.dma_dir = dma_dir_peripheraltomemory; Dma_initstructure.dma_memory0baseaddr = (uint32_t) & (Bspdata.usart_rxbuffer);
  Dma_itconfig (dma2_stream1,dma_it_tc,enable);
	
Dma_init (dma2_stream1, &dma_initstructure); 
  USART6 DMA Hair dma_initstructure.dma_channel = dma_channel_5;
  Dma_initstructure.dma_dir = dma_dir_memorytoperipheral;
  Dma_initstructure.dma_memory0baseaddr = (uint32_t) & (Bspdata.usart_txbuffer);
  Dma_itconfig (DMA2_STREAM6, dma_it_tc,enable); Dma_init (DMA2_STREAM6, &dma_initstructure);

Serial DMA receive and send initialization

Nvic initialization:

  Nvic. Nvic_irqchannel = dma2_stream1_irqn;
  Nvic. nvic_irqchannelpreemptionpriority = 0;
  Nvic. nvic_irqchannelsubpriority = 0;

  Nvic. Nvic_irqchannelcmd = ENABLE;//IRQ Channel enables
  Nvic_init (&nvic);
	
  Nvic. Nvic_irqchannel = dma2_stream6_irqn;
  Nvic. nvic_irqchannelpreemptionpriority = 0;
  Nvic. Nvic_irqchannelsubpriority =1;
  Nvic. Nvic_irqchannelcmd = ENABLE;//IRQ Channel enables
  Nvic_init (&nvic);	

Interrupt Manager Set DMA interrupt priority
Interrupt Service function:

void Dma2_stream1_irqhandler (void)
{
	if (Dma_getitstatus (dma2_stream1, DMA_IT_TCIF1)!= RESET)
  {
		Pdout (8) = 1;
		Pdout (9) = 1;
		Pdout (Ten) = 1;
    Dma_clearitpendingbit (dma2_stream1, DMA_IT_TCIF1);
		for (i=0;i<8;i++)
		{
			Bspdata.usart_txbuffer[i] = bspdata.usart_rxbuffer[i];
			Bspdata.usart_rxbuffer[i] = 0;
		}
		flag=1;
  }
	Dma_clearflag (DMA2_STREAM1,DMA_IT_TCIF1);
}

void Dma2_stream6_irqhandler (void)
{
	if (Dma_getitstatus (DMA2_STREAM6, Dma_it_tcif6)!= RESET)
  {	
		Pdout (8) = 0;
		Pdout (9) = 0;
		Pdout (Ten) = 0;
    Dma_clearitpendingbit (DMA2_STREAM6, Dma_it_tcif6);
  }

Interrupt Service function to clear the relevant flag bit