Storage management for the operating system

first, Memory abstraction
1. No memory abstraction

Early large and medium-sized computers had no memory abstraction. Each program accesses the physical memory directly, which is equivalent to exposing the physical address to the process, which poses several serious problems:

If the user program can address each byte of memory, they can easily destroy the operating system, which makes the system slowly stop running using this model, it is difficult to run multiple programs at the same time
2. A memory abstraction: address space

To ensure that multiple applications are in memory at the same time and do not affect each other, there are two issues that need to be addressed: protection and relocation. This will create a new memory abstraction: The address space . An address space is a set of addresses that a process can use to address memory. Each process has its own address space, and this address space is independent of the address space of other processes.

second, base address register and limit register
So, how do you separate the address space for each process? Here is a once-common strategy: Base Register and Boundary register. Each time a process accesses memory, takes an instruction, reads or writes a data word, the CPU hardware sends the address to the memory bus, and if the address exceeds the bounds, it generates an error and aborts access. However, the disadvantage of using this method for relocation is that each access to memory requires addition and comparison operations. Comparisons can be done very quickly, but the addition is slow in the absence of a special circuit, due to the problem of carry-over time. There is now a better mechanism to replace this strategy.
third, the operating system of idle memory management mechanism
When memory is allocated dynamically, the operating system must manage it. In general, there are two ways to track memory usage: bitmaps and idle lists.
1. Storage Management Using bitmaps

When using the bitmap method, the memory may be divided into small to few words or as large as thousands of words of the allocation unit. Each allocation unit corresponds to one in the bitmap, 0 for idle, and 1 for occupancy (or vice versa). A chunk of memory and the corresponding bitmap are shown in the left half of the figure:

2. Storage Management using a linked list

This method maintains a linked list that records the allocated memory segment and the free memory segment. One of the nodes in the list contains either a process or an empty idle area between two processes. As shown in the right half of the previous figure, each node in the list contains the following fields: an indication flag for the idle area (H) or process (P), a start address, a length, and a pointer to the next node.

Space allocation algorithm

There are several allocation algorithms that can be used to allocate memory for the created process when the process and the idle area are stored in the list in order of address, as described below:

The first adaptation algorithm the storage Manager searches along the segment list, knowing that a large enough free area is found, unless the size of the spare area is as large as the amount of space to allocate, otherwise the idle area is divided into two parts, one for the process and the other for the new idle area. The first adaptation algorithm is a fast algorithm because it searches the list nodes as little as possible. The next adaptation algorithm works the same way as the first adaptation algorithm, with the difference being that each time a suitable free area is found, the location is recorded so that the search will begin the next time you look for an idle area, rather than starting from the beginning of the last time as the first adaptation algorithm does. The performance of the next adaptation algorithm is slightly lower than the first adaptation algorithm. Optimal adaptation algorithm

The best fit algorithm searches the entire list (from start to finish) to find the smallest free area that can hold the process. The best-fit algorithm attempts to find the most realistic free area, with the best area for the request and the available free area, rather than splitting up a large idle area that might be used later. Because the entire list is searched every time a best-fit algorithm is called, it is slower than the first-time adaptation algorithm. And because it produces a lot of useless small idle areas, it wastes more memory than the first-time adaptation algorithm or the next adaptation algorithm. The worst-fit algorithm always allocates the largest available idle area, making the new idle area larger so that it can continue to be used.
Iv. switching technology and virtual memory
If the computer's physical memory is large enough to hold all the processes, there is no memory overload, but the reality is often that the total amount of RAM required for all processes is usually far beyond what the memory can support. To do this, the operating system provides two ways to handle memory Overload: Switching Technology and virtual memory .
1. Switching technology

The switching technique is to fully transfer a process into memory, make the process run for a period of time, and then save it back to disk. Idle processes are primarily stored on disk, so they do not consume memory when they are not running, and the runtime consumes memory. Swapping produces multiple idle areas (also known as voids) in memory, and by moving all the processes down as far as possible, it is possible to synthesize a chunk of these little idle pieces. This technology becomes a memory crunch . This operation is usually not performed because it consumes a lot of CPU time.

2. Virtual Memory
Virtual memory is essentially used to create a new abstract concept----address space, which is an abstraction of physical space. The implementation of virtual memory is to break up the virtual address space into pages and map each page to a page box in the physical space or to the map.
Virtual memory technology allows each process to have its own address space, which is divided into chunks, each called a page or page. Each page has a contiguous range of addresses. These pages are mapped to physical memory, but not all pages must be in memory to run the program. When a program references a part of the address space in physical memory, the hardware performs the necessary mapping immediately. When a program references a part of an address space that is not in physical memory, it is the responsibility of the operating system to load the missing part into physical memory and re-execute the failed instruction.
From a point of view, virtual memory is a synthesis of base and boundary registers, and virtual memory allows the entire address space to be mapped to physical memory in a relatively small unit, rather than as a separate relocation for the body segment and data segment.3. Implementation of virtual memoryI. The concept of paging a technique called paging is used in most virtual memory systems. The virtual address space of a process is divided into several units of the page by a fixed size, and the corresponding units in physical memory are called page boxes, and their sizes are usually the same. Page and Page box form a one by one mapping relationship, the establishment of this mapping relationship depends on a data structure exists in memory----page table. The page table structure is shown in the following figure: two. The mapping mechanism describes when the CPU executes an instruction, such as Mov AX, [1000] This instruction, it wants to copy the contents of the memory unit with address 1000 to the Reg. The address is a virtual address, which is first sent to the memory management unit MMU, and the MMU maps the virtual address to the physical memory address through the page table, as shown in the following figure:
Three. Mapping mechanism implementation
        The mapping of virtual address space to physical memory addresses is shown in the table above.         (1) When a program tries to access a mapped page, such as executing instructions         MOV REG, 0         it will Access Virtual page 0 of the No. 0 byte corresponding to the physical address, the address sent to Mmu,mmu through the page table query, see the virtual address on page 0 (0K ~ 4K), according to the mapping results, this page corresponds to the page box 2 (8K ~ 12K), so the MMU to transform the address to 8192, and send the address 8192 to the bus. Memory knows nothing about the MMU, it only sees a request to read or write address 8192 and executes it. The MMU effectively maps all 0K to 4K virtual addresses to the physical address of 8K ~ 12K.         (2) When a program tries to access an unmapped page, such as executing instructions         MOV REG, 32780       &NBSP ; It will access the virtual page 8 of the 12th byte corresponding to the physical address, the address sent to Mmu,mmu through the page table query, see that the page is not mapped, so that the CPU into the operating system, the trap is a fault. The operating system finds a page box that is seldom used and writes its contents back to disk, then reads the page to be accessed into the page box that was just recycled, modifies the mapping relationship, and then restarts the command that caused the trap. Four. The internal structure of the MMU         1. Give an example of how the inside of the MMU works         When virtual address 8192 is sent to the MMU, the 16-bit virtual address entered is divided into 4-bit page numbers and 12-bit offsets. A 4-bit page number can represent 16 pages, and a 12-bit offset can address all 4,096 bytes in a page. As shown in the following illustration, the page number can be used as the index of the page table to derive the page box number corresponding to the virtual page, and an operating system trap will be caused if the/not bit is 0. If the bit is 1, the page box number found in the page table is copied to the high 3 bits of the output register, plus the low 12-bit offset in the input virtual address. This makes up a 15-bit physical address.                &nbsp 2. The mapping mechanism of virtual address to physical address in MMU summary: Every pair of in-memory data read and write, need to access memory two times, check the page table once, read and write once. The virtual address is divided into the virtual page number (high part) and offset (low part). The virtual page number can be used as the index of the page table to find the page table entry for the virtual page. The page table entry can find the page box number (if any) and then stitch the page frame number to the high-end of the offset to replace the virtual page number to form the physical address to the memory. The purpose of a page table is to map a virtual page to a page box. Mathematically speaking, a page table is a function whose argument is a virtual page number and the result is a physical page frame number. This function allows you to replace the virtual page field in the virtual address with the Page box field to form a physical address.         five. Speed up the paging process                In any paging system, there are two issues to consider: virtual address to Physical address The mapping must be very fast if the virtual address space is large, the page table will be large         The first problem is that the virtual address-to-physical address mapping is required for each access to memory. Therefore, it is necessary for each instruction to make one or two or more page table accesses. If 1ns is required to execute an instruction, the page table query must be completed within 0.2NS to avoid mapping becoming a major bottleneck.         The second problem comes from modern computers using at least 32-bit virtual addresses, and 64-bit is becoming more common. In addition, each process has its own separate page table.         There are two simple and rude ways to deal with these two issues: page tables are placed in registers and page tables are in memory         The first approach is to: when a process is started, the operating system A copy of the Process page table stored in memory is loaded into the register, and the memory is no longer accessed for the page table while the process is running. The advantage of this is that it is simple and does not require access to memory during the mapping process, and the disadvantage is that it is expensive when the page table is large.         The idea of the second approach is that the entire page table is in memory, and the hardware required is simply a register that points to the start of the page table. The advantage of this is that the context switch only needs to reload a register, the disadvantage is that when executing each instruction, one or more memory accesses to complete the page table entry, the speed is very slow.         Now discusses the solution for accelerating the paging mechanism and handling large virtual address spaces:         1. The basic concept of using TLB (for the first problem) TLB is to set up a small hardware device in the MMU that maps the virtual address directly to the physical address without having to prevent the mosquito meter, which is called a TLB. The TLB contains a small number of table entries, which rarely exceed 64 in practice. TLB working mechanism: When converting a virtual address into the MMU, the hardware first determines whether the virtual page is in the same time by matching the virtual page number to all the table entries in the TLB (parallel). If found, the page box number is removed directly from the TLB without having to access the page table. When the virtual page number is not in the TLB, a normal page table query is made. A table entry is then eliminated from the TLB and replaced with the newly found page table entry. This way, if the page is accessed again soon, it will naturally hit the second time the TLB is accessed. When a table entry is cleared out of the TLB, the bits are copied to the In-memory page table entry, and the other values are the same except for the access bit. When a page table entry is loaded from a page table into a TLB, all values are from memory.         2. Using multilevel page tables and inverted page tables (for the second question): Multi-level page table: The reason to introduce a multilevel page table is to avoid keeping all page tables in memory, especially those that are not needed. First-level page table regardless of whether you do not map, all the table entries must exist, otherwise cannot find the portal, this will greatly increase the page table space, and the multi-level page table by only the actual use of the process of the Virtual Memory Area Request Page table to reduce the page table, that is, the process is not used by the page can temporarily not set up Inverted index: In this design, each page box in real memory has a table entry. Instead of having a table entry for each virtual page (that is, the logical address is found based on the physical address, instead of the physical address based on the logical address). When the virtual address space is much larger than the physical address space, the inverted page table saves a lot of space. The disadvantage is that you need to search the entire inverted index table to find the mapping relationship. However, the hash algorithm can be used for optimization, as shown in the following figure:         

five, page replacement algorithm
When a page fault is interrupted, the operating system must select one of the pages in memory to swap it out of memory to make room for the page to be paged in. If the page to be swapped out has been modified during memory residency, it must be written back to disk to update the copy of the page on disk, and if the page has not been modified (such as a page containing a program body), then its copy on disk is already up-to-date and does not need to be written back. Just use the paged page to overwrite the eliminated page. The following is a discussion of several page substitution algorithms: Optimal page replacement algorithm the optimal page replacement algorithm works: When a page break occurs, some pages are in memory, one of them will be accessed quickly, and other pages may be accessed after 10, 100, or 1000 instructions. Each page can be used as a marker for the number of instructions to be executed before the page is first accessed, and the optimal page replacement algorithm specifies that the most marked pages should be replaced. The biggest problem with this algorithm is that it cannot be implemented. Page replacement algorithm not recently used (NRU)

When a page in a block is accessed, its corresponding "page access" bit is automatically "1" by the hardware, and the page management software periodically resets all the page access bits to "0" (set the time to T, typically hundreds of milliseconds). In this way, in the time t, some of the visited pages have their corresponding access bit "1" and the inaccessible page has a corresponding access bit of "0". Query a page to access a page with a bit "0" and replace it. First-in-one-out page replacement algorithm (FIFO) maintains a linked list of all currently in-memory pages by the operating system, with the most recently entered pages placed at the end of the table, and the longest entered page is placed on the table header. When a page break occurs, the table header is eliminated and the newly paged page is added to the footer. A good approximation of the least recently used page replacement algorithm (LRU) LRU algorithm is based on the observation that pages that are frequently used in the previous instructions are likely to be used in several subsequent directives. Conversely, pages that have not been in use for a long time are likely to remain unused for a longer period in the future. This algorithm reveals an achievable algorithm: When a page break occurs, the most unused pages are replaced, and this strategy becomes the LRU permutation algorithm.