Study on auxiliary clock of AT91RM9200 Platform

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Study on auxiliary clock of AT91RM9200 Platform
[Date:] Source: MCU and Embedded System Application Author: baili Ren nun, Lanzhou Jiao Tong University [Font:Large Medium Small]

 

Introduction
In VxWorlks, the implementation of the timer mechanism is based on the clock. Different Timing mechanisms can be selected based on different requirements, such as taskDelay (), WatchDog, and auxiliary clock. The first two timer types are based on the system clock.
TaskDelay () is the simplest latency method. The Unit is tick, so the delay accuracy is not high, but it is sufficient for systems with a latency of more than 10 ms. TaskDelay () can be used to convert the called task from the ready state to the sleep state, but cannot be used to interrupt the service program. In addition, you can call taskDelay (0) to deliver the CPU to other tasks with the same priority in the system.
The watchdog timer is maintained as part of the system clock interruption service program. Therefore, the function associated with the watchdog timer runs at the system clock interruption level, with the unit of delay being tick. If the application requires multiple watchdog functions, you can use wdCreate () to generate an independent watchdog ID for each requirement, because for the given watchdog ID, only the latest wdStart () is valid. With the watchdog timer, the called task is not blocked because the wdStart () call returns immediately. However, it is generally only applicable to systems with a latency of more than 10 ms.
If you need more accurate timing (such as 1 MS) In practice, then the use of auxiliary clock is a very desirable method. Generally, no secondary clock is configured in the BSP of the VxWorks system. This article describes the configuration and usage of the secondary clock in detail, so that it can be used flexibly in practice.

1 AT91RM9200 Industrial Platform clock and Timer
This article is based on the AT91RM9200 Industrial Platform. Therefore, we need to first introduce the clock and timer on this platform.
AT91RM9200 provides two 3-Channel 16-bit timers/counters (TC ). The three channels are independent, but the operations are the same. Each channel is user-configurable, including three external clock inputs (XC0, XCl, or XC2 ), five internal clock inputs (TIMER_CLOCKl, TIMER_CLOCK2, TIMER CLOCK3, TIMER_CL0CK4, TIMER_CLOCK5), and two user-configurable multi-function input/output signals. In addition, each channel can work in two different modes: Capture Mode and waveform mode. The capture mode provides signal measurement, and the waveform mode is used to generate a waveform, which can be set by the WAVE bit programming of the TC channel mode register. The timer/Counter Diagram 1 is shown.

When channel signals are selected, XCO, XCl, and XC2 indicate three external clock inputs. TIOA and TIOB indicate two multi-function input/output signals acting on each channel; INT indicates interrupt signal output; SYNC indicates synchronous input signal. If the block signal is selected, TCLKO, TCLKl, and TCLK2 indicate three external clock inputs. TIOAO ~ TIOA2, indicating channel 0 ~ 2 TIOA signal, TIOB0 ~ TIOB2 indicates channel 0 ~ 2 TI0B signal.
Five internal clock inputs are related to the master clock (MCK), slow clock (SLCK), and clock after the master clock division, as shown in table 1.

2. Configure the secondary clock in VxWorks
In the VxWorks operating system, if you want to use the secondary clock, you must go through some configuration before using it. First, you need to define in the Vxworks component or config. h:
# Define INCLUDE_AUX_CLK
If not defined, the secondary clock cannot be used. In addition, the auxiliary clock must be initialized in the sysHwlnit2 function of sysLib. C, that is, the disconnection Configuration:
(Void) intConnect (AUX_TIMER_INT_VEC, sysAuxClkInt, O)
The difference between the secondary clock and the system clock is that the secondary clock must be provided by the user ISR, but tickannounce () cannot be called in the ISR; otherwise, the system clock mechanism will be disrupted.
You can configure the secondary clock according to installdir/target/drv/Tim-er/templatetimer. c. The driver used in this article is at91rm9200timer. c. The header file is at91rm9200timer. h. The modifications made in this file need to be made based on the specific chip on which it depends. That is, you need to refer to the at91rm9200 chip data manual.
Auxiliary clock-related functions include sysauxclkint (), sysaux-clkconnect (), sysauxclkdisable (), sysauxclkenable (), sysauxclkrateget (), and sysauxclkrateset (). Sysauxclkrateget () and sysauxclkrateset () can be considered as a group. Sysauxclkrateget () is read by using the clock frequency set by the sysauxclkrateset () function, while the clock frequency set by the sysauxclkrateset () function is subject to aux_clk_rate_min and aux_clk_rate_max. The maximum and minimum values need to be defined, the location of the definition may be different, some put in eonfig. H, some put in BSP. H, the maximum and minimum values of this article are defined in the Inte-grator.h. Next we will focus on the sysaux-clkint () and sysauxclkenabel () functions.
The sysauxclkint () function calls the User-Defined interrupt processing function, and the user-called interrupt processing function is connected by the sysauxclkconnect () function. Before calling the interrupt handler, you must clear the interrupt operation first, for example:
Amba_timer_read (amba_timer_t2sr (amba_timer_base), temp );
Otherwise, the CPU will be interrupted and nothing else can be done.
A lot of other work is done in the sysAuxClkEnble () function. According to the specific situation of AT91RM9200, select one of the five internal clocks and TIMER_CLOCK2 here. According to the channel concept mentioned above, select 2nd channels. The clock must be separated from the system clock. You cannot select an internal clock and the same channel at the same time.
First, you need to determine whether the auxiliary clock is configured by the power management, you can view the relevant files. If no configuration is available, perform the following Configuration:
AT9l_SYS → PMC_PCER = l <AT9lC_ID_TCl;
Second, you must first program AIC and then configure TC.
Then, you need to control the specific registers. First, you need to select the internal clock, as shown in figure 2.

Control the channel mode register:
AMBA_TIMER_WRITE (AMBA_TIMER_T2MR (AMBA_TIMER_BASE), TIMER_CLOCK2 | TC_CPCTRG );
Use the TCCLKS bit to select 2nd internal clocks and compare the RC Trigger Based on the timer value written into the RC register. At the same time, you need to control the TC channel control register, write the counter clock enabling command and Software Triggering command, such:

AMBA_TIMER_WRITE (AMBA_TIMER_T2CR (AMBA_TIMER_BASE), TC_CLKEN );
AMBA_TIMER_WRITE (AMBA_TIMER_T2CR (AMBA_TIMER_BASE), TC_SWTRG );
In addition, because RC registers are used to trigger the Enable, you also need to control the TC interrupt enable register, and write the RC to compare the interrupt enable signal, for example:
AMBA_TIMER_WRITE (AMBA_TIMER_T2IER (AMBA_TIMER_BASE), TC_CPCS );

Finally, you need to perform the interrupt enabling operation, for example:
AMBA_TIMER_INT_ENABLE (AUX_TIMER_INT_LVL );
After all the configurations are complete, re-compile the bootroFll and VxWorks images, start the VxWorks image, and write a test program to test whether the secondary clock is configured successfully. In addition, you can use the logical analyzer to view the interruption of the secondary clock. After the secondary clock driver, you can use the sysAuxClkRateSet () function in the application to dynamically set the number of system secondary clock interruptions per second. The sysAuxClkConnect () function specifies ISR for the system secondary clock interruption, the sysAuxClkEnable () function can interrupt the clock and call the specified ISR.

Knot
VxWorks provides a system-assisted clock mechanism to enable users to select more scheduled resources than the system clock, and provides management measures. In addition, some auxiliary debugging tools of VxWorks may require the use of system auxiliary clock.
The secondary clock is used to increase the Cycle rate. Increasing the Cycle rate means that the clock interruption is generated more frequently, so the interrupt processing program will be executed more frequently. This will bring the following benefits to the entire system:
① A higher definition of clock interruption (resolution) can improve the resolution of Time-driven events;
② Improve the accuracy of Time-driven events (accuracy ).

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