TF trap (8th bits): Set 1 to enable single-step execution debugging mode, set 0 to disable single-step execution. In single-step execution mode,
The processor generates a debugging exception after each instruction, so that the execution program can be viewed after each instruction is executed.
If the program uses the POPF, POPFD, or IRET command to set the TF flag, then the first command
A debugging exception occurs.
IF interrupt permit (9th bits): controls the processor's response to blocked hardware interrupt requests. IF this parameter is set to 1, the shielded hardware is enabled.
Interrupt response. IF it is set to 0, the hardware interrupt response can be blocked. IF flag does not affect exceptions or unshielded interruptions (NMI)
The VME flag in the. CPL, IOPL, and control register CR4 determines whether the IF flag is available by CLI, STI, POPF,
Modify the POPFD and IRET commands.
Iopl I/O privileged domain (12,13): indicates the I/O privileged level of the current process or task. The CPL of the current process or task must be
IOPL is smaller than or equal to IOPL to access the I/O address space. Only processes with CPL 0 can use POPF or IRET commands.
Modifying this domain. IOPL is one of the mechanisms for controlling the modification of the IF flag, and also when the virtual mode extension (Control
The VME location in the CR4 register. It controls the Interrupt Processing Mechanism in virtual 8086 mode.
NT nested tasks (14th bits): controls the nested execution chains of interrupted and called tasks. The processor calls
This bit is set when a task is interrupted or triggered abnormally. When the IRET command is called, this bit is detected and modified when the returned result is returned.
This flag can be directly set by the POPF/POPFD command or set to 0. However, when the flag status is changed in the application
Unexpected exceptions.
RF recovery (16th-bit): controls the processor's response to the command breakpoint. If you set this parameter to 1, disabling the command breakpoint temporarily causes debugging exceptions (# DE ),
However, other exceptions can still occur. If 0 is set, a debugging exception occurs when the breakpoint is set.
The main function of the RF flag is to permit the execution of the command following the debugging exception (triggered by the command breakpoint.
The debugging software must set this position in the EFLAGS image in the stack to 1 before returning the program to be interrupted using the IRETD command,
To prevent the breakpoint from generating another debugging exception. After the breakpoint command is returned and successfully executed, the processor will automatically reset
This location permits the generation of command breakpoint faults.
VM Virtual 8086 mode (17th bits): Set 1 to virtual 8086 mode, and set 0 to return protection mode.
AC alignment check (18th bits): set this flag and the AM flag of the control register CR0 to enable alignment check on memory reference,
The alignment check is disabled when the two flags are cleared. An alignment check is generated when a non-alignment operand is referenced.
Exception. For example, if a word address is referenced in an odd address or a double word address is referenced in an address not a multiple of 4, the alignment check is performed.
An exception is generated only in the user State (level 3 privilege). Memory Reference with default privilege 0, such as loading of segment descriptor table, does not
This exception occurs even if the same operation occurs in the user State.
Alignment check exceptions are used to check data alignment. This is useful when data is exchanged between processors.
Data Alignment. Alignment check exceptions can also be used by the interpreter. Making some pointers out of alignment is like making a special mark.
You do not need to check each pointer. You only need to process these special pointers when using them.
These special pointers cause alignment exceptions, which can be placed in the alignment exception handler.
Corresponding processing method ).
VIF virtual interrupt (19th bits): a virtual image of the IF sign. This sign is used together with the VIP sign. When sending
When the VME or PVI flag in CR4 is set to 1 and the IOPL is smaller than 3, the processor only recognizes the VIF flag (the VME flag is used to enable
Virtual 8086 mode extension, PVI flag enables virtual interruption in protected mode ).
VIP virtual interrupt wait (pending) (20th bits): Set 1 to indicate that there is an interrupt waiting for processing, set 0 to indicate that there is no waiting for processing
The identifier is used with VIF. The processor reads the identifier but never modifies it. When the VME flag or control register
When the PVI flag in CR4 is set to 1 and the IOPL is smaller than 3, the processor only recognizes the VIP flag. (The VME flag enables virtual 8086 mode extension,
PVI flag enable protection mode virtual interrupt ).
ID Recognition (21st bits): 1 or 0 indicates whether the CPUID command is supported.
From: IA-32 Volume 3: System Programming Guide
