Talk about the cost component of a chip

As a member of the electronics industry chain, both chip designers, producers, testers and users are interested in knowing exactly what parts of a chip the cost is. Here I would like to briefly explain my understanding.

On the big side: the cost of the chip itself, the costs of the chip design process, the equipment and the development environment required for non-disposable chip design.

first, focus on the cost of the chip itself

This part is mainly made up of the area of chip monolithic That is, the area of die decision. Different processes, such as 65nm,40nm or 28nm die area is different, while the corresponding wafer price is also different, assigned to hard cost per chip = A process a foundry corresponding to the price of wafer/a wafer can be cut out of the number of die . The price of wafer itself is related to the complexity of the chip design itself, how many layers of mask, how many layers of metal and so on. The above Hard costs also need to consider the problem of yield. Wafer After cutting out, the yield is different, the cost of a good die is different. For example, the yield can reach 90% and only 70%, for a single wafer also cut 900 pieces of the cost of a good single die 9:7 difference.

, which says hard cost and yield. The number of IP in this chip is bought by others, such as arm. Some IP is a one-time payment, do not consider the chip in the cost of single chip. However, some IP such as arm is not only nre, but also a single piece of the royalty required for each piece. This royalty may be a fixed number, which may be a percentage, however, is directly superimposed on the cost of a monolithic chip. So this part cannot be underestimated. For example, a chip hard cost $ $ $, consider that several of the hairs are IP royalty yo. This IP is sometimes not just part of the hardware, it may be software, such as Java. So IP this licensing business model, in the process of single-chip scale replication, in fact, continue to give the authorized party printing money yo. (Speaking of which, I can't help but sigh a few words.) Now the domestic development of integrated circuit products, we know that our chip design company is basically the stage of the purchase of a bunch of IP integration phase, and the main IP vendor are foreign old company, or working with them ~) chip die after shipment, need to be packaged and tested to get all the good chip.

The cost of encapsulating and testing a single piece should also be included in the final chip cost. The package testing process will improve the rate of improvement, this yield calculation can be placed after this stage. A summary of the formula is as follows: monolithic chip cost = (a process a foundry corresponding to the price of wafer/a wafer can be cut out of die number of chips + package and test the cost of a single piece)/yield + IP royalty

second, briefly talking about the cost of the chip design process

The first is the salary of the designers, and even some outsourcing design service costs, mainly charging. Then there is the one-time cost of buying many IPs . IP is also mentioned, because this part is not a small number. Ddr/usb/gmac/wifi/bluetooth and so on these IP are not to spend a small money can buy, a few m yuan.

the cost of chip production, such as mask cost, test machine design costs, packaging design costs and so on . Mask design costs, directly related to the chip design, the use of what technology, how many layers constitute and other factors. Package design costs are also related to the design, in what package form, whether multiple die package together, and so on factors. These costs appear to be one-off, plus not a small number at a time. That's why a chip design company is generally afraid to make a decision if the number of millions is not sold. The initial large-scale capital investment will be able to get a copy of the chip. Relying on the meager profits of each chip will slowly be able to initially invest in hundreds of thousands of or even millions of of the sales point, only to balance back.

third, the cost of equipment and development environment required for non-disposable chip design

For example, the chip front-end design of the simulation environment, low-power process design tools, timing simulation tools, chip back-end design tools and so on . These tools are also expensive and come from two of thousands of foreign companies. Input of test equipment, such as signal source, spectrum analyzer, Logic Analyzer. In particular, communication system chips need a variety of system emulators and so on. Following the evolution of the 3GPP version, the instrument also needs to be constantly upgraded and other costs. These costs cannot be fully counted in the cost of a single chip, but today chip design companies also need to buy.

Source: Electronic Engineering Album

Talk about the cost component of a chip