Talking about I2C bus

I2C (Inter integrated circuit, internal integrated circuit) bus is a very inexpensive and efficient network for interconnecting peripherals in small, embedded systems. The I2C bus is sometimes called IIC, which has a history of more than more than 20 years. The I2C interface and the SPI interface work the same, but the two methods are different.
　　
The I2C bus uses two lines to connect multiple devices in a multiple-branch bus. This bus is bidirectional, low-speed, and synchronized with the public clock. A device can be directly connected to the I2C bus or removed from the bus, without affecting other devices. Some manufacturers such as Microchip, Philips, Intel, and other small microprocessors are built with a I2C interface. The data transmission rate of I2C bus is slower than that of SPI bus, the transmission speed in standard mode is 100kbps, and 400kbps in fast mode.
　　
The two lines used to connect between devices using the I2C interface are the SDA(serial data) and the SCL(serial clock), which are both open and leak through a pull resistor to the positive power supply, so throw at a high level when not in use. Devices that communicate using the I2C bus drive these two lines into low levels and keep them high when not in use. Each device connected to I2C has a unique address, which can be a data sender (bus host), receiver (bus from machine), or both. I2C is a multihomed bus, which means that multiple devices can act as a bus host role.

Figure 1. I2C Bus Wiring Diagram

　　Both the SDA and the SCL are bidirectional. The SPI bus has two separate lines for two-direction communications, but unlike the I2C bus, it uses the same root line to complete the host sending data and receiving the response from the machine. In addition, unlike the SPI bus, which has multiple working modes, I2C bus only one mode of operation, the clock line SCL and data line SDA between the timing relationship is very simple and intuitive: when Idle, SDA and SCL are high levels, only the SDA into a low level, and then the SCL also become low power peacetime, before beginning Data transmission of the I2C bus. When both the SDA and the SCL are turned down, the transmission of all incoming device packets on the bus begins, and after the SCL becomes low, SDA sends the first valid data bit, which is called the start condition .
　　
For each person being transmitted, when the SCL is low, the SDA must become valid on the SDA, the bit is sampled from the data bits on the top of the SCL, and must remain valid until the SCL becomes low again, and then SDA the next one before the SCL becomes a high level again.
　　
Finally, the SCL changes to a high level, and then the SDA becomes high and the data transfer ends. This is called the end condition .

Figure 2. Start and end conditions for I2C bus transmission

No matter how large the packet can be transmitted through the I2C bus. Like the SPI bus, I2C is also high on the first transmission. If the data receiver is unable to receive more data, it can interrupt the transmission by keeping the SCL low, which forces the data sender to wait until the SCL is released again.
　　
Each byte sent by the sender must be confirmed by the receiving party, at the end of each byte's 8th digit, the sender releases the data line SDA, and then the host generates an extra clock pulse on the SCL, which triggers the receiver to acknowledge the bytes received by placing the SDA at a low level. If the receiver fails to set the SDA to a low level, the sender interrupts the transmission and takes appropriate error-handling measures.

Figure 3. I2C Packet with receiver confirmation

Because I2C is a multihomed bus, it is possible for multiple hosts to attempt to start data transmission at the same time. The SPI bus uses a separate slice selection to make the receiver effective, and each SPI has a separate slice selection from the machine, which is driven by the host. I2C does not have such a selection mechanism, but each device on the bus has a unique address, the packet transmission first sends the address bit, then the data. An address byte consists of 7 address bits and an indication bit. If the indication bit is 0, it means that the transmission is a write operation, the selected machine receives the data and takes it as input, and if the indication bit is 1, the data is sent back to the host computer.

The I2C bus also supports an extended 10-bit addressing mode with a connection of up to 1024 peripherals, and devices with 7-bit addressing mode and 10-bit addressing mode can be mixed in the same system. 10-bit addressing, use 2 bytes to save the address. If the 1th address byte starts with 0b11110xx_ , it generates a 10-bit address, and the 1th byte 1th, 2 bits (No. 0 bit is the read-write indicator bit) and the 2nd byte 8 bits together Form 10-bit addresses. The 7-bit device will ignore this process.

Figure 4. I2C Normal and 7-bit address format with repeat start conditions

Figure 5. I2C bus 10-bit address format