The sensitive variables in always

Source: Internet
Author: User

If there is a judgment statement under the Always statement if, then the condition in the IF statement must have a sensitive variable in all.

Otherwise the error prompt is: error (10200): Verilog HDL Conditional Statement error at ...: cannot match operand (s) in the condition to the Corr Esponding edges in the enclosing event control of the construct

such as [email protected] (Posedge CLK or Negedge rstn)

Indicates that the ALWAYS statement block is triggered when the two sensitive events occur along the CLK rising edge or the R_est drop edge, while the IF condition statement must have at least one condition pointing to one of the sensitive events (the boundary identifier); so write "if (r_est) ... else ..." Will go wrong.

You can change [email protected] (Posedge CLK or Negedge rstn) to [email protected] (Posedge CLK or Posedge rstn) to compile.

Cause of Error:

Cause:in a conditional statement at the specified location in a Verilog Design File (. v), you specified a condition that Quartus II Integrated Synthesis cannot use-classify the edges in the enclosing always construct ' s event control. When a event control contains multiple edges, Quartus II Integrated Synthesis distinguishes the asynchronous control sign The ALS from the clock is analyzing the conditional statements in the construct. For example, the following code fragment contains a always construct whose event control contains three edges---both async Hronous resets and a clock.
Always @ (Posedge CLK or Posedge rst1 or Posedge rst2)
Begin
if (Rst1 | | rst2)
Q <= 1 ' B0;
Else
Q <= D;
End
Quartus II Integrated Synthesis uses the IF condition to identify the both asynchronous resets and, by implication, the CLO Ck. For edge classification, Quartus II Integrated Synthesis requires the a condition fall into one of both categories. It can refer to a single edge identifier (to match Posedge events) or its complement (to match Negedge events), for Exampl E, Rst1,!rst1, Rst1 = = 1 ' b1, Rst1 = 1 ' B0. It can also or both or more expressions this each refer to a single edge identifier OR its complement, for example, (Rst1 | | RST2), (!rst1 | |!rst2).
Can receive this error if your condition tests for the wrong polarity, or if it tests for the value of a variable that Is isn't an edge in the event control. For example, to match a Posedge rst event, the condition must is rst or rst = 1 ' B1.
Finally, you can receive the this error if your is attempting to use a single condition expression to test for both an ASYNCHR Onous Reset/set and a synchronous reset/set condition. The following code fragment contains an example of a illegal condition expression:
Always @ (Posedge CLK or Posedge rst)
Begin
if (rst | | sync_rst)
Q <= 1 ' B0;
Else
Q <= D;
End
Quartus II Integrated Synthesis generates this error message when compiling this design because it cannot match Sync_rst t O an edge on the sensitivity list.

Reason:...... Specifies a condition that the Quartus II complex cannot use to differentiate a boundary from the event control of a closed always structure. When an event control contains multiple boundaries, the Quartus II complex distinguishes between clock and asynchronous control signals by analyzing conditional statements in the always structure.

The Quartus II incorporates an IF condition to identify two asynchronous reset signals and implicitly identifies the clock signal. In order to classify the need, the Quartus II integrated device needs to have one condition falling into one of two categories. It can point to a separate boundary identifier (to match the Posedge event) or its complement (to match the Negedge event), for example, Rst1,!rst1, Rst1 = = 1 ' B1, rst1 = = 1 ' B0. It can also be or two or more expressions, each of which points to a separate boundary identifier or its complement ...
You receive this error when your condition test finds the wrong polarity, or if it tests the value of the variable, but the value is not a boundary in the event control. For example, in order to match an Posedge rst event, the condition must be rst or rst = 1 ' B1.

The sensitive variables in always

Contact Us

The content source of this page is from Internet, which doesn't represent Alibaba Cloud's opinion; products and services mentioned on that page don't have any relationship with Alibaba Cloud. If the content of the page makes you feel confusing, please write us an email, we will handle the problem within 5 days after receiving your email.

If you find any instances of plagiarism from the community, please send an email to: info-contact@alibabacloud.com and provide relevant evidence. A staff member will contact you within 5 working days.

A Free Trial That Lets You Build Big!

Start building with 50+ products and up to 12 months usage for Elastic Compute Service

  • Sales Support

    1 on 1 presale consultation

  • After-Sales Support

    24/7 Technical Support 6 Free Tickets per Quarter Faster Response

  • Alibaba Cloud offers highly flexible support services tailored to meet your exact needs.