The upgraded version of the black gold Development Board is perfect !!!

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Sorry, it's been too long for everyone to wait. The upgraded black gold Development Board can finally meet you. According to your needs, I have made constant changes to it, so the longer the time is, the more I believe that it is worthwhile to use this time to wait for an upgraded version of the black gold Development Board. I agree with this sentence, but I am developing the black gold development board based on this principle. I will keep the development and innovation of the black gold Development Board. There is a lot of nonsense. Next, I will introduce the resource configuration and other situations of the upgraded black gold Development Board.

Let's take two full-body photos first. You can have a general concept.

 

Two more local images can be seen in the interface.

 

 

 

Next, let's look at the core board,The size of the core board is 7.6*7.6

 

 

 

 

 

Below is the bottom plate, which is still quite empty, and there is still a lot of room for development. Haha

Last two core board size comparison photos, there is a hand, don't be scared, haha

 

 

The following describes the resources:

 

Core board configuration

The FPGA chip configured on the core board is of the Cyclone II series.Ep2c8q208c,8256Les,36M4k Ram blocks (4 kbits plus 512 parity bits)165,888 bitRam, support18Embedded multipliers and2And rich resources. The experiment shows that the chip runs all the peripherals on the black gold Development Board by embedding the niosii soft core, which only accounts for 70-80% of all resources.

The core board is equipped64 mThe bit SDRAM provides a powerful guarantee for running the Nios soft core. This chip provides a clock frequency of 143 MHz. The experiment shows that the frequency of the Nios II soft core can run smoothly at 120 MHz, the speed is still quite fast.

16 mBit configuration chip also adds a lot of color to this core board, not only can store configuration information, but also can realizeProgramStorage, the program you write is no longer worried about.

The 20 m active crystal oscillator is also essential. It is the clock source of the entire system. The four LEDs provide a lot of convenience for debugging. Reset the buttons and reconfigure the buttons, you can configure only one indicator. The as mode and JTAG mode are also supported.

In addition,A larger feature of the core board is that it can run independently of the bottom board.It is equipped with a 5 V Power interface and a high quality red switch, and a self-recovery fuse is added for safety. Of course, expansion ports are indispensable, except for the 38 Io ports occupied by SDRAMAll 100 I/O extensionsTo fully prepare for the Self-extension experiment.

 

 

 

Bottom expansion board configuration

To enable FPGA to exert its powerful functions, the black gold development board designs a resource-rich bottom expansion Board (called the bottom expansion board because we will also have an expansion Board later) for it ). Next we will briefly introduce the resource configuration of the Extended Board under the supervisor.

2. Supports network functions and configures the enc28j60 network port chip. Enc28j60 is a 28-pin independent Ethernet Controller launched by microchip technology. At present, most Ethernet controllers on the market are encapsulated with more than 80 pins, while the enc28j60 compliant with the IEEE 802.3 protocol has only 28 pins, which can provide the corresponding functions and greatly simplify the related design, reduce Space.
4. Supports the USB function and configures the ch376 chip. Ch376 supports USB devices and USB hosts, and has built-in basic firmware for the USB communication protocol and built-in firmware for processing the dedicated communication protocol for mass-storage massive storage devices, built-in SD card Communication Interface firmware, built-in fat16 and FAT32 and fat12 file system management firmware, supports common USB storage devices (including USB drive, USB drive, USB flash drive, and USB card reader) and SD cards (including standard capacity SD card and high capacity HC-SD card as well as Protocol compatible MMC card and TF card ).
6. Supports 128*64 lattice LCD on board. St7565 P control chip, built-in DC/DC circuit, adjust the contrast through software. The chip supports parallel port and serial port.
8. Supports real-time clock (RTC) and ds1302 chip configuration. Ds1302 is a high-performance, low-power, real-time clock circuit with Ram launched by Dallas. It can time the year, month, day, week, hour, minute, and second, provides the leap year compensation function with a working voltage of V to 5 V ~ 5.5 V. The three-line interface is used for synchronous communication with the CPU, and multiple bytes of clock signal or RAM data can be transmitted at a time in an emergency mode. Ds1302 has a 31 × 8 RAM register for temporary data storage. Ds1302 is an upgraded product of ds1202. It is compatible with ds1202, but it adds a dual-power pin for the main power supply/back power supply, and provides the ability to charge the back power supply with a small current.
10. Supports EEPROM and 24lc04 chip is configured. 24lc04 is a 512 * 8bit EEPROM and supports IIC interfaces.
12. Supports the PS/2 interface and the keyboard and mouse of the PS/2 interface.
14. Supports RS232 serial interfaces to send and receive serial data.
16. Six common Yang digital tubes are supported.
18. Five independent buttons can work with the LCD to build a perfect man-machine interface.
20. Supports VGA interfaces.
22. Supports buzzer.

This is basically the case. Let's take a look. Thank you for your criticism and guidance. your comment is the power and source of the black gold Development Board and the foundation for our improvement. Thank you!