Timer interrupts each register meaning

Source: Internet
Author: User

Interrupt registers, Timer/counter related registers themselves or related bits are used to initialize, the content of the interrupt function is mainly to reflect the operation after the interruption (write code within the interrupt function).

1. Interrupt Allow register IE

Figure 1. Interrupt Register IE

The interrupt register is used to set the opening and closing of each interrupt source, ie in the special function register, the byte address is a8h, the bit address (from low to high) is A8H~AFH, the register runs bit addressing, and each individual of the register can be operated separately. When the microcontroller is reset, IE is all zeroed out. Here are the specific meanings of each of you in different states:

EA-------Global interrupt allow bit

EA = 1, turn on global interrupt control, under which each interrupt control bit (TRN bit in the Tcon register) controls the opening and closing of the corresponding interrupt.

EA = 0, turn off all interrupts.

--Invalid bit

et2--Timer/Counter 2 interrupt Allow bit

ET2 = 1, open T2 interrupt.

ET2 = 0, shutdown T2 interrupt.

es--serial port interrupt allow bit

ES = 1, open the serial port interrupt.

ES = 0, turn off the serial port interrupt.

et1--Timer/Counter interrupt allow bit

ET1 = 1, open T1 interrupt.

ET1 = 0, shutdown T1 interrupt.

ex1--External Interrupt 1 interrupt allow bit

EX1 = 1, open an external interrupt 1 interrupt.

EX1 = 0, Shutdown external Interrupt 1 interrupt.

et0--Timer/Counter 0 interrupt allow bit

ET0 = 1, open T0 interrupt.

ET0 = 0, shutdown T0 interrupt.

ex--External Interrupt 0 interrupt allow bit

EX0 = 1, open an external interrupt 0 interrupt.

EX0 = 0, Shutdown external interrupt 0 interrupt.

2. Timer/Counter related registers (Tmod,tcon)

Timer/Counter operating mode register (TMOD)

Figure 2: Timer/Counter operating mode register

Timer/Counter operating mode register in a special function register, the byte address is 89H and cannot be bit addressed. The tmod is used to determine the operating mode and function selection of the timer. The tmod is completely zeroed when the microcontroller is reset. Here's what you mean under different values:

Gate-gate control bit.

GATE = 0, Timer/counter start and stop is controlled only by trn (n = 0, 1) in the Tcon register.

GATE = 1, the timer/counter starts and stops co-controlled by the level state of the TRN (n=0, 1) and the external interrupt pin (INT0 or INT1) in the Tcon register.

c/t '--timer mode and counter mode select bit.

c/t ' = 1, for the counter mode; c/t ' = 0, for timer mode.

m1m0--mode of operation Select a bit (see table below)

Figure 3: How the Timer/counter works in 4

Timer/Counter Control register Tcon

Timer/Counter control register in a special function register, the byte address is 88H, the bit address (from low to high) is 88H~8FH, the register can be bit addressable. The Tcon register is used to control timer start, stop, Flag register overflow and interrupt conditions. When the microcontroller is reset, the Tcon are all zeroed out. The meanings of the different values that you are assigned are as follows:

Figure 4: Timer/Counter Control register Tcon

tf1--Timer 1 Overflow flag bit

When the timer 1 is full overflow, the hardware makes the TF1 1, and the request is interrupted. The hardware automatically zeroed out after entering the interrupt program. If the use of timer interrupt, the bit is not manual operation, but if the software query method, when the query to the bit is 1 o'clock, the software should be zeroed.

tr1--Timer 1 run control bit

Clear 0 off timer 1 by software. When gate = 1, and INT1 is high, TR1 1 start timer 1, and when gate = 0 o'clock, TR1 1 o'clock can start timer 1.

tf0--Timer 0 Overflow flag bit, function and operation mode and TF1 same.

tr0--Timer 0 runs the flag bit, its function and operation way with TR1.

ie1--external interrupt 1 request flag

When IT1 = 0, the level trigger mode, each machine cycle s5p2 sampling INT1 pin, if the INT1 pin is low, then 1, otherwise IE1 clear 0.

When IT1 = 1,int1 is a jump-edge trigger, when the first machine cycle is sampled to INT1 for low, then IE1 1. Ie1=1, the external interrupt 1 is requesting an interrupt to the CPU. When the CPU response is interrupted, the bit is cleared by hardware 0 when it turns to the interrupt service program.

it1--external Interrupt 1 trigger mode select bit

It1= 0, is the level trigger mode, the pin INT1 on the low active.

IT1 = 1, for the jump edge trigger mode, the pin INT1 on the level from high to low negative jump effective.

ie0--External interrupt 0 request flag, its function and operation mode with IE1.

it0--External Interrupt 0 Trigger mode Select bit, its function and operation mode with IT1.

3. Summary

<1> The various registers listed above are for the initialization part of the interrupt program that we write. When we initialize part of the program, we can query the individual bit meanings of each register according to the specific requirements, and give different values to different functions according to the requirement.

<2> to write a timer interrupt function, you need to know how the interrupt function is written, and you need to write an initial value for Thn, TLn (n= 0, 1). Then it is clear how the SCM works after downloading the specific executable program. These will remain recorded in the next note.

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Timer interrupts each register meaning

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