tms320f28027 PWM Module

Summarize the 28027 PWM module.

28027 contains pwm1,pwm2,pwm3,pwm4 four PWM modules, all of the PWM module register structure is the same, the only difference is the synchronization of the sequence of operation is not the same.

The PWM module can be divided into a timer base, a counter comparison (Counter Compare), a PWM waveform generator (Action qualifer), a dead-zone setting (Dead Band), a high-frequency PWM chopper (PWM chopper), Error handling (Trip Zone), event triggering and interrupts (events Trigger and Interrupt) are composed of sub-modules, the basic diagram is as follows.

The following are the sub-modules in the order of document SPRUGE9E:

1. Time Benchmarks

The function of this module is to generate three signals,

When the value of the CTR=PRD count register equals the period register, the resulting pulse sequence

The value of the ctr=0 count register equals 0 o'clock, and the resulting pulse sequence

The ctr-dir represents the counting direction, the counter counts up from time to time is 1, the down count is always 0, and the count up to period down to 0 (up-down) is 1-0 alternating.

In addition, the module can accept the synchronization signal from the previous PWM module and send a synchronous signal to the next PWM module.

The Tbctl settings are as follows:

Count Mode (Up,down,up-down),

Synchronous enable (whether to load the value of the phase register to the Count register when the sync signal is received),

The mode of operation of the cycle register (read-write directly or shadow register and then load to the cycle register at some point)

Synchronous signal Output Trigger mode

Software synchronization

Divider factor (set the clock frequency of the PWM module)

After synchronizing the count direction setting (in Up-down count mode, set the count direction after synchronization, the setting is not valid in other modes)

PWM count setting during emulation

Tbsts PWM Status Register

Tbphs phase register (only used when synchronizing)

TBCTR Count Register

TBPRD Cycle Register

Other registers are used in high-resolution PWM, and now it doesn't matter

PWM module synchronization can be understood as multiple cycles equal to the PWM module when emitting a PWM signal, the value of the counter equal or maintain a fixed difference. This is important when working with space-vector voltages.

The 28027 synchronization process is as follows:

PWM1 can accept the external synchronization signal, and then send a synchronization signal to PWM2, the same PWM2 generate a synchronous signal to PWM3 ...

Only PWM1 can accept external sync signals (pin name Epwm1synci), and other PWM modules can accept the synchronization signal from the previous module.

Each PWM module can emit a synchronous signal to the next module, which is set in the Tbctl Register (Syncosel). (00-Input sync signal trigger, 01-ctr=0 trigger, 10-CTRCMPB trigger, 11-no sync signal)

The time reference module has several timing diagrams for setting up instances, where one is selected. Where the PWM module receives the synchronization signal, the count register loads the value of the phase register.

2. counting Comparison module

The function of this module is to compare the value of the comparison register CMPA,CMPB with the previous count register tbctr to generate Ctr=cmpa and CTR=CMPB two pulse sequence signals.

The relevant registers of this module are as follows

Cmpctl can set CMPA,CMPB load from shadow

CMPA,CPMB 16-bit value register

3. PWM Waveform generator (Action Qualifier)

The module generates two PWM waves: PWMA,PWMB.

The previously generated Ctr=cmpa, CTR=CMPB ctr=prd,ctr=0, to determine pwma and PWMB, when is 1, when is 0, or when to flip

The relevant registers are as follows:

Aqctla set pwma in Ctr=cmpa (rising edge, Falling edge), CTR=CMPB (rising edge, Falling edge), ctr=prd,ctr=0 what to do separately (clear 0; set 1; Flip or do Nothing)

Aqctlb set PWMB in Ctr=cmpa (rising edge, Falling edge), CTR=CMPB (rising edge, Falling edge), ctr=prd,ctr=0 what to do separately (clear 0; set 1; Flip or do Nothing)

AQSFRC set a single software trigger, and the impact of software triggering on pwma PWMB.

AQCSFRC the effect of continuous software triggering on pwma PWMB. (Editor's note: Do not know how the continuous software trigger is generated, a single software trigger can be set in the AQSFRC. ）

4. Dead- zone settings

The dead zone can be set up conveniently to generate two complementary or identical PWM waveforms.

Related storage such as

Dbctl settings in the six switches, in the s0,s1 are 0 o'clock, dead-zone settings are invalid, s0,s1 = 1,1,s4,s5=0,0, the EPWMXB is invalid, can be generated by EPWMXA two-way or complementary PWM.

dbred,dbfed sets the lag time for the rising and falling edges.

5. PWM Chopper

The chopper section has only one control register, not much to say, anyway I can not use, also do not know where will need to use this.

Approximate functions such as the PCLK of the input PWM waveform with the high frequency signal (close to the time frequency, the duty ratio of the signal can be adjusted in the ([1,7]/8) range) overlay.

、

6. error Handling (Trip-zone)

As described in the documentation, this module controls the behavior of the PWM according to the TZ1-6 signal (which can be an external signal or internally generated). Can be used to do overcurrent protection, current limit, etc.

Tzsel Select TZ Signal (DCAEVT1/2, DCBEVT1/2, Tz1-6) (one shot and cycle by cycle two modes)

Tzdctl setting the TZ signal corresponding operation (set 1, clear, high resistance, do nothing)

Tzdcsel setting conditions for generating a digital comparator event

Tzeint interrupt enable for the corresponding signal

TZFLG TZ Trigger Flag

TZCLR TZ Trigger Flag zeroing

TZFRC Software triggering TZ Event

7. Event triggering (Event-trigger)

The event trigger module generates a Epwmxint Epwmxsoca EPWMXSOCB three signals that can be used to trigger ad conversions

Etsel enable and select things to trigger the source

ETPS Selecting the Crossover factor (1;1/2;1/3)

ETFLG Event Trigger Status ID

ETCLR Clear Status Identification

ETFRC software trigger correspondence is an event

tms320f28027 PWM Module