Topic 3-assembly language play to the turn

I. Compilation overview
1. The reason for using the assembly (1) Start the code: in the bootloader and the initialization of the kernel to use the assembly, because there is no resume C language operating environment.
(2) code that has special requirements for efficiency: The assembly code is highly efficient.
2. Classification
(1) ARM standard assembler: Assembler for ARM, suitable for use with ads in Windows environments.
(2) GNU Compendium: cross-Compiler for GNU, for Linux environments. The GNU assembly is now mostly used.
3. Assembler Framework
(1) Entrance: _start: Code of Assembly
(2) before the entrance, of course, there must be. Global _start marked as an entry point
(3) in front of the global Declaration, there should be. Section.text indicates that the code snippet is stored behind
(4) At the very beginning can have
. section.data
"Initialized Data"
And
. SECTION.BSS
"Data for Initialization"

Image: 1.png

4. Preparation (1) Install Jlinkgdnserver
(2) Hardware connection (3) Writing assembly source code and makefile
(4) Start Eclipse, create a new project (5) similar to the previous section, configure the debug environment, Debug, general on-line debugging is for elf files

0.GNU Compilation Lowercase Main
1. Arithmetic logic instruction (1)

Image: 2.png

(2)

Image: 3.png

(3)

Image: 4.png

(4)

Image: 5.png

(5)

(6)

Image: 7.png

ARM Standard assembler% represents binary, but the GNU assembly must be 0b to represent the binary
2. Compare class directives
(1)

Image: 8.png

(2)

Image: 9.png

3. Jump Instruction/Branch instruction
(1)

Image: 10.png

(2)

(3) The following conditions are available for the above instructions

Image: 12.png

Image: 13.png

(4) b jump will not save the return address to the link register, which is the difference with BL
4. Shift Class directives
(1) LSL

Image: 14.png

(2) ROR

Image: 15.png

5. Program Status Word access instruction
Cannot directly manipulate the program status Word register
(1) MSR
From the general register to the status Word register
(2) Mrs
From the status Word directive to the general register
6. The above are instructions for ARM core registers
(1) Ldr
From memory to internal registers
(2) Str
From internal registers to memory

Image: 16.png

[attachment=1829]

Image: 17.png

(3) LDM

Image: 18.png

Image: 19.png

coprocessor directives
1. Coprocessor: Used to perform specific tasks to reduce the burden on the processor core. A total of 16 coprocessors can be supported, CP15 most important.
2.CP15: The system control coprocessor, provides many registers, facilitates the control Cache,mmu, the clock system and so on.
Access to his main is to access her registers, thus achieving control over the system
Some registers in the 3.CP15 will indicate the processor model and ID
4.MCR: From general-purpose registers to co-processors
5.MRC: from coprocessor to General register
6.redhat Click the blank bar below to change the locale by logging off the user

Image: 20.png

Image: 21.png

Pseudo-directive
1. Machine code is generated by assembler through assembler, has a certain format, different instructions have different format, to the data transfer class instruction

Image: 22.png

The lower 12 bits in the back represent a limited range of data, so use pseudo-directives to handle this dilemma.
2. Define class pseudo-directives: primarily at compile time
It looks like an instruction, but it's just like. Instead of generating machine code, it works at compile time, telling the compiler how to compile, and the other is converting to other actual instructions.
GNU style usually adds a dot to the front
(1) Global: Defines a symbol as global. A sub-function that is usually labeled like a C language
(2) Data: Used to define the segment. Stores the initialized data.
(3) ASCII: string-type data
(4) Byte: Byte type data
(5) Word: Child data
(6) equ: A macro definition similar to the C language. Equ da,0x89
(7) Align: control alignment. Precede the label (address/instruction) that needs to be aligned (adjusted)
3. Operation class Pseudo-instruction
(1) Ldr: The same name as the memory access instruction Ldr. There is no need to add a bit earlier.
However, the general instruction can not access the immediate number of the binary 8-bit, because the machine code low 12 bits have four bits is used to store the shift situation, so only 8 bits can be used to hold the actual operand.
The immediate number in this case is marked with the LDR pseudo-directive instead of the memory Access Command LDR.
ARM's PC pointer points to 8 offsets after the current instruction
(2) NOP: empty operation, delay. In order to meet the timing requirements.
4. Commonly used disassembly to view the actual dynamic of the instruction, enter the comparison machine code

Topic 3-assembly language play to the turn