Traveling Wave counter

<title>Traveling Wave counter</title>

The Traveling wave counter refers to the output pin of each register connected to the clock pin of the next level register as shown in:

A trigger is used to drive the clock input of other triggers, and there is usually a problem. Due to the propagation delay of each register, and the delay of each trigger clock, the input clock of the next-level trigger is offset, resulting in a cumulative delay, as shown in.

The row-wave counter is a huge challenge for static timing analysis because each stage in the row-wave counter produces a new clock, which requires the static timing tool to process more clock domains, which can consume more time.

Although there are many defects in the traveling wave counter, the traveling wave counter can reduce the leakage current of the circuit and lower the power consumption of the circuit, and an example is given below to analyze why the traveling wave counter can reduce the power dissipation. The receiving circuit uses a low-efficient enable input signal and reads the value of the 4-bit counter only when the clock is low. Once the clock pulse is placed high, the receiving circuit stops responding to the output of the counter circuit. Because the counter circuit is triggered by a positive edge, the counter behavior occurs during the clock from low to high, so that the receiving circuit is in an invalid state until the 4-bit output signal of the counter is switched stably. The receiving circuit will not turn on until the clock signal returns, so that all the traveling waves are in a safe state and the current counter value is read into the receiving circuit.

Reference: The Art of Hardware Architecture

From for notes (Wiz)

Traveling Wave counter