The TTL circuit is the abbreviation for transistor-transistor logic circuit (transister-transister-logic), which is a digital integrated electrical
A wide range of roads. It is manufactured with a bipolar process and features high speed, low power consumption and variety.
CMOS is: A metal-oxide-semiconductor (metal-oxide-semiconductor) structure of transistors referred to as MOS transistors,
There are P-type MOS tubes and N-Type MOS tubes. An integrated circuit consisting of a MOS tube is called a MOS IC, and the
A complementary MOS integrated circuit consisting of a pmos tube and a nmos tube is a cmos-ic (complementary MOS
Integrated circuit).
Performance characteristics of CMOS integrated circuits
The single-door quiescent power dissipation of a micropower-cmos circuit is in the Milli-Watt (NW) Order of magnitude.
The noise tolerance of the high noise tolerant-cmos circuit is generally above 40% supply voltage.
Wide operating voltage range the supply voltage of the-cmos circuit is generally 1.5~18 volts.
High logic swing-cmos circuit output high, low amplitude reaches the full power of VDD, logic "0" for VSS.
The input impedance of the high input impedance--cmos circuit is greater than 108 Ω, typically up to 1010 Ω.
The fan-out capability of the--cmos circuit is greater than 50 for high fan-out capability.
The input capacitance of the low input capacitance--cmos circuit is generally less than 5PF.
Wide operating temperature range-the CMOS circuit in the ceramic package has a working temperature range of
-0C ~ 0C, Plastic-encapsulated CMOS circuit for –40 0C ~ 0C.
1,ttl level:
Output high-level >2.4v, output low-level <0.4v. At room temperature, the general output high level is 3.5V, the output low level
Is 0.2V. Minimum input high and Low: input high level >=2.0v, input low level <=0.8v, noise tolerance is
0.4V.
2,cmos level:
1 Logic level voltage is close to the supply voltage, and 0 logic level is close to 0V. It also has a wide noise tolerance.
3, Level conversion circuit:
Because the TTL and COMs values are different (TTL 5v<==>cmos 3.3v), it is necessary to connect to each other
To the level of the conversion: it is with two resistors to the electric pressure, there is nothing advanced things. Ha ha
4,oc Gate, that is, open collector gate circuit, OD door, that is open-drain gate circuit, must be outside the pull resistance and power to
Switch level can be used as high and low level. Otherwise, it is generally used only as a switching high voltage and high current load, so it is called drive
Moving gate circuit.
5,ttl and COMs circuit comparison:
1) The TTL circuit is a current control device, and the COMs circuit is a voltage control device.
2) The TTL circuit is fast, the transmission delay time is short (5-10ns), but the power consumption is large. COMs the speed of the circuit is slow, transmission
Long delay time (25-50ns), but low power consumption. The power consumption of the COMs circuit itself is related to the pulse frequency of the input signal, the more frequency
High, the more hot the chip set, this is normal phenomenon.
3) Locking effect of COMs circuit:
COMs circuit because of the input too large current, the internal current sharply increased, unless the power is cut off, the current has been increasing
Big. This effect is the locking effect. When the locking effect is generated, the internal current of the COMs can reach above 40mA, which is
Easy to burn chips.
Defensive measures:1) at the input and output end of the clamp circuit, so that the input and output does not exceed the specified power
Pressure.
2) The power input of the chip is coupled with a decoupling circuit to prevent a momentary high voltage at the VDD end.
3) Add a wire-flow resistor between the VDD and the external supply, even if a large current does not allow it to go in.
4) When the system is powered by several power supplies, the switch must be in the following order: on, first open
COMs the power supply of the circuit, and then turn on the input signal and the load of the power supply, turn off the input signal and the load of the electricity
Source, and then turn off the power of the COMs circuit.
Precautions for the use of 6,coms circuits
1) COMs circuit voltage control device, its input total resistance is very large, the ability to capture interference signal is very strong. The
To, do not leave the pin not dangling, to connect the pull-up resistor or pull-down resistor, give it a constant level.
2) When the input terminated the signal source of the lower group, the current limiting resistor should be connected between the input terminal and the signal source, so that the input
The current limit is within 1mA.
3) When the long signal transmission line is connected, the matching resistor is terminated in the COMs circuit.
4) When the input is terminated with a large capacitor, the resistor should be indirectly protected at the input and capacitance. Resistance value is R=v0/1ma.v0
Is
The voltage on the external capacitor.
5) COMs input current of more than 1mA, it is possible to burn coms.
Load characteristics of input terminals in 7,ttl gate circuits (handling of special cases of input-side resistance):
1) is equivalent to the input termination high level when dangling. Because at this point it can be considered as the input terminating an infinitely large resistor.
2) Enter the low level after the 10K resistor is connected in series at the input end of the gate circuit, and the input output is high rather than low
Flat. Because the input terminal load characteristics of the TTL gate circuit, only when the input termination of the series resistance is less than 910 Kohm,
It input low-level signal can be recognized by the gate Circuit, the series resistance is large, the input terminal has been high power
Flat. This must be noted. The COMs Gate Circuit doesn't have to be considered.
The 8,TTL Circuit has an open collector OC Gate, and the MoS tube also has an open drain OD gate corresponding to the collector, and its output
Just call
Do an open-drain output. OC door at the cutoff of the leakage current output, that is leakage current, why have leakage current? That's because
When the three-tube cutoff, its base current is approximately equal to 0, but not the real 0, after the transistor collector
The very current is not really 0, but about 0. And this is the leakage current. Open-Drain output: OC Gate output is open
Leakage output, OD gate output is also open-drain output. It can absorb very large currents, but cannot output the current outward.
Therefore, in order to be able to input and output current, it should be used with the power and pull-up resistor together. OD Gate generally as
Output buffers/drivers, level translators and the need to absorb large load currents.
9, what is the totem pole, and what is the difference between it and the open-drain circuit?
In the TTL IC, the output of the connected-to-pull transistor is called the Totem pole output, not the OC Gate. Because
TTL is a three level off, totem pole is also two three-level tube push-pull connected. So push-pull is totem. General Totem Style
Output, high level 400UA, low level 8MA
The difference between TTL level and CMOS level
2007-11-16 14:07
TTL level signals are used most often because the data is usually expressed in binary terms, which is equivalent to the logic "1", 0V equivalent
In logic "0", which is called TTL (transistor-transistor logic level) signaling system, which is a computer processor-controlled device
Standard technology for communication between parts of the interior.
TTL level signals are ideal for data transfer within a computer processor-controlled device, first calculating
The data transmission within the machine-controlled device is not high on the power supply and the heat loss is low, and the TTL level signal
Direct connection to an integrated circuit without the need for expensive line drivers and receiver circuitry; Moreover, computer processor control
The data transmission inside the device is carried out at high speed, and the operation of the TTL interface can satisfy this requirement. TTL Type Communication Large
In most cases, parallel data transfers are used, and parallel data transmissions are not suitable for distances of more than 10 feet.
This is because of both reliability and cost. Because of the problem of partial phase and asymmetry in parallel interface, these problems
Reliability, and for parallel data transmission, the cost of cables and connectors is higher than in serial communication
Some.
What is the TTL level, what is the CMOS level, the difference between them
A TTL High level 3.6~5v, low level 0v~2.4v
CMOS level Vcc up to 12V
CMOS circuit output High level is about 0.9VCC, and the output low level is about
0.1VCC.
CMOS circuits do not use the input terminal can not be suspended, can cause logic confusion.
The TTL circuit does not use an input terminal that is floating high
In addition, the CMOS IC supply voltage can vary in a larger range, so the requirements for the power supply is not the same as the TTL IC
The sample is strict.
They can be compatible with TTL levels.
Two TTL level is 5v,cmos level is generally 12V.
Because the TTL circuit supply voltage is the 5V,CMOS circuit supply voltage is generally 12V.
The 5V level does not trigger a CMOS circuit, and a 12V level can damage the TTL circuit and therefore cannot be matched against each other.
Three TTL level Standard
Output L: <0.8v; h:>2.4v.
Input L: <1.2v; h:>2.0v
TTL device output low to less than 0.8V, high level is greater than 2.4V. Input, less than 1.2V is considered to be 0, above 2.0
It is considered to be 1.
CMOS level:
Output L: <0.1*VCC; h:>0.9*vcc.
Input L: <0.3*VCC; h:>0.7*vcc.
General MCU, DSP, FPGA whether the discipline between them can be directly connected. In general, the same voltage is available
, but it's best to check the VIL,VIH,VOL,VOH values on the technical manual to see if they match (VOL to small
For Vil,voh to be greater than VIH, refers to a connection). Some are not problematic in general applications, but the parameters are
is a bit of a mismatch, in some cases it may not be stable enough, or different batches of devices will not work.
For example: 74LS of the device output, access to the 74HC device. It works well under normal circumstances, but in parameters
are mismatched and cannot be run in some cases.
TTL vs. COMS level usage Differences
1, the upper and lower limits of the level of the definition of different, CMOS has a larger noise-resistant area.
With 5 volt power supply, the TTL is generally 1.7V and 3.5V, CMOS is generally
The appearance of 2.2v,2.9v is inaccurate and is for reference only.
2, the current drive capacity is not the same, TTL generally provides 25 MA drive capacity, and
CMOS is generally around 10 ma.
3, the required current input size is not the same, the general TTL needs about 2.5 mah, CMOS
Almost no current input is required.
4, many devices are compatible with TTL and CMOS, datasheet will be described. If you do not consider
Speed and performance, the general device can be interchangeable. However, it is important to note that sometimes load effects may
Cause the circuit to work abnormally, because some TTL circuits require the next level of input impedance as
Load to work properly.
Ttl--transistor-transistor Logic
Httl--high-speed TTL
Lttl--low-power TTL
Sttl--schottky TTL
Lsttl--low-power Schottky TTL
asttl--advanced Schottky TTL
alsttl--advanced Low-power Schottky TTL
FAST (F)--fairchild Advanced Schottky TTL
Cmos--complementary Metal-oxide-semiconductor
Hc/hct--high-speed CMOS Logic (HCT compatible with TTL level)
ac/act--advanced CMOS Logic (ACT is compatible with TTL level) (also known as ACL)
ahc/ahct--advanced high-speed CMOS Logic (AHCT compatible with TTL level)
Fct--fact extension series, compatible with TTL level
Fact--fairchild Advanced CMOS Technology, which
1,ttl level:
Output high level 〉2.4v output low level 〈0.4v
At room temperature, the general output high level is 3.5V output low is 0.2V.
Minimum input high and low level
Input high-level 〉=2.0v input low-level "=0.8v
Its noise tolerance is 0.4V.
2,cmos level:
The logic level voltage is close to the supply voltage, and the 0 logic level is close to 0V. It also has a wide noise tolerance.
3, Level conversion circuit:
Because the TTL and COMS values are different (TTL 5vcmos 3.3v), it is necessary to connect to each other
To the level of the conversion: it is with two resistors to the electric pressure, there is nothing advanced things.
4,oc Gate, that is, open collector gate circuit, OD door, that is open-drain gate circuit, must external pull resistance and power to
Switch level is used as high and low level. Otherwise, it is generally used only as a switching high voltage and high current load, so it is called drive
Moving gate circuit.
5,ttl and COMS circuit comparison:
1) The TTL circuit is a current control device, and the COMs circuit is a voltage control device.
2) The TTL circuit is fast, the transmission delay time is short (5-10ns), but the power consumption is large.
The COMS circuit has a slow speed, long transmission delay (25-50ns), but low power consumption.
The power consumption of the COMS circuit itself is related to the pulse frequency of the input signal, the higher the frequency, the hotter the chip set, which is normal
Phenomenon.
3) Locking effect of COMS circuit:
COMS circuit because of the input too large current, the internal current sharply increased, unless the power is cut off, the current has been increasing
。 This effect is the locking effect. When the locking effect is generated, the internal current of the COMS can reach more than 40mA, it is easy to
Burn the chip.
Defensive measures:
1) at the input and output end of the clamping circuit, so that the input and output does not exceed the specified voltage.
2) The power input of the chip is coupled with a decoupling circuit to prevent a momentary high voltage at the VDD end.
3) Add a wire-flow resistor between the VDD and the external supply, even if a large current does not allow it to go in.
4) When the system is powered by several power supplies, the switch should be in the following order: Open, first open the COMS circuit power
Power to the input signal and load, turn off the input signal and the load, and then close the COMS
Power to the circuit.
Precautions for the use of 6,coms circuits
1) COMS circuit voltage control device, its input total resistance is very large, the ability to capture interference signal is very strong. So
, do not leave the pin not dangling, to connect the pull-up resistor or pull-down resistor, give it a constant level.
2) When the input terminated the signal source of the lower group, the current limiting resistor should be connected between the input terminal and the signal source, so that the input
The current limit is within 1mA.
3) When the long signal transmission line is connected, the matching resistor is terminated in the COMS circuit.
4) When the input is terminated with a large capacitor, the resistor should be indirectly protected at the input and capacitance. The resistance value of r=v0/1ma.v0 is
The voltage on the external capacitor.
5) COMS input current of more than 1mA, it is possible to burn COMS.
Load characteristics of input terminals in 7,ttl gate circuits (handling of special cases of input-side resistance):
1) is equivalent to the input termination high level when dangling. Because at this point it can be considered as the input terminating an infinitely large resistor.
2) Enter the low level after the 10K resistor is connected in series at the input end of the gate circuit, and the input output is high rather than low
Flat. Because the input terminal load characteristics of the TTL gate circuit, only when the input termination of the series resistance is less than 910 Kohm,
It input low-level signal can be recognized by the gate Circuit, the series resistance is large, the input terminal has been high power
Flat. This must be noted. The COMS gate Circuit doesn't have to be considered.
The 8,TTL Circuit has an open collector OC gate, and the MOS tube has an open-drain OD gate corresponding to the collector, and its output is called
Do an open-drain output.
OC door at the cutoff of the leakage current output, that is leakage current, why have leakage current? That's because when three-machine tubes are cut
The base current is approximately equal to 0, but not true to 0, the current of the collector through the transistor
is not the real 0, but about 0. And this is the leakage current. Open-Drain output: The output of the OC gate is the open-drain output; OD
The output of the door is also an open-drain output. It can absorb very large currents, but cannot output the current outward. So, in order to
can input and output current, it should be used with the power and pull-up resistor together. OD gate generally as output buffer/drive
Converters and the need to absorb large load currents.
9, what is the totem pole, and what is the difference between it and the open-drain circuit?
In the TTL IC, the output of the connected-to-pull transistor is called the Totem pole output, not the OC gate. Because
TTL is a three level off, totem pole is also two three-level tube push-pull connected. So push-pull is totem. General Totem Style
Output, high level 400UA, low level 8MA
1.
Logic level of TTL circuit and CMOS Circuit
VOH: Logic level1 Output voltage
VOL:Logic level0 Output voltage
VIH:Logic level1 of input voltage
VIH:Logic level0 of input voltage
TTL Circuit Critical Value:
Vohmin
=2.4VVolmax =0.4V
Vihmin
=2.0VVilmax= 0.8V
CMOS Circuit critical value (supply voltage is + +)
Vohmin
= 4.99V
Volmax=0.01V
Vihmin
=3.5VVilmax=1.5V
2.
Logic level translation for TTL and CMOS
CMOS level can drive TTL level
The TTL level does not drive the CMOS level and requires a pull resistor.
3.
Common Logic chip features
74LS Series:Ttl
Input:Ttl
Output:Ttl
74HC Series:Cmos Input:CmosOutput:Cmos
74HCT Series:Cmos Input:Ttl
Output: Cmos
CD4000 Series:CmosInput:CmosOutput: Cmos
TTL Circuit COMS Circuit difference
