Two ways of writing a state machine

Two ways to do the state machine publish time: 2015-09-13 13:22 read: 1972 recommendations: 3 [Favorites]

The FSM idea of finite state machine is widely used in the design of hardware control circuit, and it is also a kind of processing method commonly used in software (software called FMM finite message machine). It decomposes complex control logic into a finite stable state, judging events in each state, changing continuous processing into discrete digital processing, and conforming to the working characteristics of the computer. At the same time, because the finite state machine has a finite state, it can be implemented in practical engineering. But this does not mean that it can only be processed in finite time, on the contrary, the finite state machine is a closed-loop system, finite infinity, can be used in a finite state, processing infinite transactions.

The finite state machine works as shown in 1, after an event occurs, the action is determined according to the current state (Cur_state), and the next status number (Nxt_state) is set.

Figure 2 is the state transition diagram for a state machine instance, which means:

• In the S0 state, if a E0 event occurs, the A0 action is performed and the state remains unchanged;
• If the E1 event occurs, then the A1 action is performed and the state is transferred to the S1 mode;
• If the E2 event occurs, then the A2 action is performed and the state is transferred to the S2 mode;
• In the S1 state, if a e2 event occurs, the A2 action is performed and the state is transferred to the S2 State;
• In the S2 state, if a E0 event occurs, the A0 action is performed and the state is transferred to the S0 state.

Finite state machines can be represented not only by state transition graphs, but also by two-dimensional tables. The current status number is generally written on the rampage, and the event is written on a column, as shown in table 1. where "--" means null (no action, no State transfer), "AN/SN" means execute action an, and the next state is set to SN. The meanings shown in table 1 and Figure 2 are exactly the same.

Observation Table 1 shows that the state machine can be implemented in two ways: vertical writing (judging the event in the state) and writing horizontally (judging the state in the event). The two implementations are completely equivalent in nature, but in practice the effects are quite different.

Write (Judge event in state) C snippet:

Cur_state =Nxt_state;Switch (cur_state)//Judging events in the current state{Case S0://In the S0 stateif (e0_event)//If the E0 event occurs, then the A0 action is performed and the state remains unchanged;{//Perform a0 actions;//Nxt_state = S0;//Because the status number is itself, you can delete this sentence to increase the speed of the operation.}Elseif (e1_event)//If the E1 event occurs, then the A1 action is performed and the state is transferred to the S1 mode;{//Perform A1 actions; Nxt_state =S1; }Elseif (e2_event)//If the E2 event occurs, then the A2 action is performed and the state is transferred to the S2 mode;{//Perform a2 actions; Nxt_state =S2; }Else{Break; }Case S1://In the S1 stateif (e2_event) // If the E2 event occurs, then the A2 action is performed and the state is transferred to the S2 State;  {// perform a2 action; Nxt_state = S2;} else {break; } case S2: // in S2 state if (e0_event)  {// perform a0 action; nxt_state =  S0;}             

Write (Judge status in event) C snippet:

//The function that executes when the E0 event occursvoid E0_event_function (int *Nxt_state) {IntCur_state; cur_state = *Nxt_state;Switch(cur_state) {Case S0://Watch table 1, when the E0 event occurs, the S1 is emptyCase S2://Perform a0 actions; *nxt_state =S0; }}//The function that executes when the E1 event occursvoid E1_event_function (int *Nxt_state) {IntCur_state; cur_state = *Nxt_state;Switch(cur_state) {Case S0://Watch table 1, when the E1 event occurs, S1 and S2 are empty// perform A1 action; *nxt_state =//e2 event occurs when the function int * Nxt_state) {int cur_state; cur_state = *nxt_state; switch (cur_state) {case s0: //case S1: // perform a2 action; *nxt_state = S2;}           

Above and below the two code snippets, the implementation of the function is exactly the same, but the horizontal writing effect is significantly better than the vertical writing effect. The reasons are as follows:

1, vertical write implied priority ranking (in fact, each event is the same priority), the preceding event judgment will undoubtedly take precedence over the following event judgment. This limitation on the If/else if notation will break the original relationship between events. There is no problem with writing sideways.

2, because the number of events in each state is inconsistent, and the time of the event is random, can not be predetermined, resulting in vertical writing reduced to sequential query mode, structural defects make a lot of time wasted. For cross-write, at a certain point in time, the state is the only certainty, in the event of the search status as long as the use of the switch statement, can be positioned to the corresponding state, delay time can be pre-accurate estimation. And when the event occurs, call the event function, in the function to find the only certain state, and according to its execution action and state transfer of the idea clear concise, high efficiency, rich beauty.

In short, I personally think that in the software to write the state machine, the use of horizontal writing method to compare the appropriateness.

The vertical writing method is not completely unable to use, in some small projects, logic is not too complex, functional simplification, and in order to save memory costs, the vertical writing method is also a suitable choice.

In FPGA hardware design, state-centric implementation of the control circuit state machine (vertical write) seems to be the only option, because the hardware is less likely to be driven by events (written sideways). However, there is a global clock in the FPGA, the state switch on each rising edge, so that the efficiency of vertical writing is not low. Although the hardware in the vertical write to use if/elsif such query statements (with VHDL development), but they are mapped to the hardware is a combination of logic, the query will only cause gate-level delay (NS magnitude), and hardware is really parallel work, so vertical writing in the hardware there is no negative impact. Therefore, in the hardware design, the use of vertical writing method to become the inevitable choice. This is why a lot of hardware engineers in the design of software state-of-the-way only use the vertical writing method, the lid of the thinking is also.

Finite state machines are used in both TCP and PPP framework protocols, which are best implemented in a cross-write manner. As an example of a TCP protocol, see Figure 3, there are three types of events: command events on the upper level, incoming flags for the lower layer, and packet events for data; Timeout Timer timeout event.

　　

Figure 3 shows that this TCP stack is implemented in a cross-write manner, there are 3 kinds of event processing functions, upper command processing functions (such as tcp_close), timeout event handlers (Tmr_slow), and the lower packet event handler function (tcp_process). It is worth mentioning that in the packet event function, in each state to judge Rst/syn/fin/ack/data and other signs (these signs are similar to the event), looks like the vertical writing method, in fact, if the Baotou and the data as a whole, then, rst/syn/fin/ack/ The data and other flags do not have to be seen as independent events, but rather in the details of the same packet-receiving event, so that it is not considered to be looking for events in the state, but in general, it is looking for the state in the packet-receiving event (horizontal write).

In the PPP is everywhere can see the horizontal writing phenomenon, have time to elaborate. I personally feel that before implementing the PPP framework protocol, it is necessary to understand both the two ways of writing, and only use the horizontal write way to achieve the perfect PPP.

Two ways of writing a state machine