U-Boot porting (3)

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4. Support for norflash startup:

(1) Before adding the norflash function, you must first check the specific parameters of norflash, And the norflash model of the board I use is en29lv160a. View the PDF and find the following parameters:

<1> 2048 K * 8bit/1024 K * 16bit flash memory Boot Sector flash memory

<2> Flexible sector architecture:

-One 16-kbyte, two 8-kbyte, one 32-kbyte, and thirty-one 64-kbyte sectors (byte mode)

-One 8-kword, two 4-kword, one 16-kword, and thirty-one 32-kword sectors (word mode)

The preceding parameters show that the total number of sectors in the two modes is 35.

(2) start modification: Modify in include/configs/smdk2440.h:

1. First shield the unused nor model:

/*-----------------------------------------------------------------------
* Flash and Environment Organization
*/
# If 0 // comment out the following two types of nor flash settings, because they are not the models we use
# Define config_amd_lv400 1/* uncomment this if you have a lv400 flash */
# Define config_amd_lv800 1/* uncomment this if you have a lv800 flash */
# Endif

2. Then add support for the en29lv160a model: (add to the file above)

// Add the following content to row 3:

# Define config_eon_29lv160ab 1 // Add tq2440 Development Board nor flash settings
# Define phys_flash_size 0x200000 // Our Development Board's nor flash is 2 m
# Define config_sys_max_flash_sect (35) // according to the en29lv160ab chip manual description, a total of 35 sectors
# Define config_env_addr (config_sys_flash_base + 0x80000) // temporarily set the first address of the environment variable to 0x80000 // put the uboot parameter at K

(3) Add the norflash information to include/flash. h:

Add row 122nd:

# Define eon_manufact 0x001c001c // vendor ID

Add row 181st

# Define eon_id_lv160ab 0x22492249 // device ID

(4) modify the norflash DRIVER:

In U-boot, The nor flash operations are initialized, erased, and written respectively. Therefore, we mainly modify the three functions closely related to hardware: flash_init, flash_erase, and write_hword.

VI Board/Samsung/smdk2440/flash. c

By-one 8-kword, two 4-kword, one 16-kword, and thirty-one 32-kword sectors (word mode)

We can see that the size of the main sector is 32 KB, and so is changed to 31st rows.

# Define main_sect_size 0x8000 // It is defined as 32 K and the size of the main sector

# Define mem_flash_addr1 (* (volatile 00000555 *) (config_sys_flash_base + (0x<1 )))
# Define mem_flash_addr2 (* (volatile 2010*) (config_sys_flash_base + (0x000002aa <1 )))

Since we connected norflash to the bank0 of S3C2440, the base address in norflash is 0x00000000 relative to the S3C2440, that is, config_sys_flash_base = 0.
The reason why we moved the address in norflash to the left (multiplied by 2) Is that we connected the addr1 of S3C2440 to A0 of norflash.

According to the data manual, the size of en29lv160ab 0th is 8 K, 1st, 2 is 4 K, 3rd is 16 K, and the last 31 is 32 K. The size of the first four sectors is equal to 32 KB.

For (j = 0; j <flash_info.sector_count; j ++)

{
If (j <= 3)
{
/* 1st one is 8 KB */
If (j = 0)
{
Flash_info.start [J] = flashbase + 0;
}

/* 2nd and 3rd are both 4 kb */
If (j = 1) | (j = 2 ))
{
Flash_info.start [J] = flashbase + 0x2000 + (J-1) * 0x1000;
}

/* 4th 16 KB */
If (j = 3)
{
Flash_info.start [J] = flashbase + 0X4000;
}
}
Else
{
Flash_info.start [J] = flashbase + (J-3) * main_sect_size;
}
}
Size + = flash_info.size;

Modify flash_print_info and add the following information about en29lv160ab:

Switch (Info-> flash_id & flash_vendmask ){
Case (amd_manufact & flash_vendmask ):
Printf ("AMD :");
Break;
Case (eon_manufact & flash_vendmask ):
Printf ("eon :");
Break;
Default:
Printf ("unknown vendor ");
Break;
}

Switch (Info-> flash_id & flash_typemask ){
Case (amd_id_lv400b & flash_typemask ):
Printf ("1x amd29lv400bb (4 Mbit) \ n ");
Break;
Case (amd_id_lv800b & flash_typemask ):
Printf ("1x amd29lv800bb (8 Mbit) \ n ");
Break;
Case (eon_id_lv160ab & flash_typemask ):
Printf ("1x en29lv160ab (16 Mbit) \ n ");
Break;

Default:
Printf ("unknown chip type \ n ");
Goto done;
Break;
}

Modify int flash_erase (flash_info_t * info, int s_first, int s_last)

If (Info-> flash_id & flash_vendmask )! =
(Eon_manufact & flash_vendmask )){
Return err_unknown_flash_vendor;

During compilation, the following error occurs:

Rm-Linux-ld: Error: usr/local/ARM/3.3.2/lib/GCC/ARM-Linux/3.3.2/libgcc. A (_ udivdi3. OS) uses hardware FP, whereas U-boot uses software fp

Arm-Linux-ld: failed to merge target specific data of file/usr/local/ARM/3.3.2/lib/GCC/ARM-Linux/3.3.2/libgcc. A (_ udivdi3. OS)

Arm-Linux-ld: Error:/usr/local/ARM/3.3.2/lib/GCC/ARM-Linux/3.3.2/libgcc. A (_ clz. OS) uses hardware FP, whereas U-boot uses software fp

Arm-Linux-ld: failed to merge target specific data of file/usr/local/ARM/3.3.2/lib/GCC/ARM-Linux/3.3.2/libgcc. A (_ clz. OS)

Make: *** [U-boot] Error 1

In this case, the problem of both D-pilot and one hundred-degree soft floating point was solved.

Solution:

Find the/u-boot-1.1.4/CPU/ARM920T/config. mk File

The file content is as follows:

Platform_relflags + =-fno-strict-aliasing-fno-common-ffixed-r8 \

-Msoft-float

Platform_cppflags + =-March = armv4

# Supply options according to compiler version

Platform_cppflags + = $ (call CC-option,-mapcs-32,-mabi = APCs-GNU)

Platform_relflags + = $ (call CC-option,-mshort-load-bytes, $ (call CC-option,-malignment-traps ,))

Modify the file:

Platform_relflags + =-fno-strict-aliasing-fno-common-ffixed-r8 \

#-Msoft-float

...............................

Platform_cppflags + = $ (call CC-option,-mapcs-32) #,-mabi = APCs-GNU)

Platform_relflags + = $ (call CC-option,-mshort-load-bytes, $ (call CC-option,-malignment-traps ,))

Keep up and try again: Make clean and then make all. OK compiled