Understanding about GPIF in CY7C68013

Init Val of internal rdy:
Determines the initial status of the internal rdy and the value of the 7th-bit intrdy of gpifradycfg. The internal rdy is the status controlled by firmware as rdy6, not by the status of the rdy pin (RDY0-RDY4. When you do not need to judge the gpifradycfg.7 status in GPIF, this setting does not matter.

Meaning of sync rdy to ifclk:
When GPIF samples rdy, whether it is synchronous (SAS = 0) or Asynchronous Sampling (SAS = 1). When it is Asynchronous Sampling, the rdy signal detected by GPIF is actually in the status before 24ns. 48 MHz

SUBST Tc FOR rdy5:
If this option is selected, gpifradycfg.5 is set to 1, indicating that tcxpire will be used to represent the status of rdy5. When rdy5 = 1, it indicates tcxpire = 1, while tcxpire = 1 indicates that the transfer counter has been reduced to 0.

The preceding three settings correspond to the three bys of gpifreadycfg: bit7, bit6, and bit5.

Each GPIF waveform can define up to 7 Programmable states (S0-S6) and an unprogrammable idle state (idle), where you can program to achieve:
1. Control the output of CTL (high, low, float)
2. provide data for the FIFO data line or collect data for the FIFO data line
3. Increase the value of the GPIF address line
4. Add a pointer to the FIFO to provide data from the next FIFO to the data line or read data from the data line to the next FIFO address.
5. The gpifwf interruption is triggered.

In addition, in each status, the logic and, Or, exclusive or operation of any two variables can be detected to switch the status based on the true and false results of the operation (see the logic function register for details ).
1. Rdyx Input Pin status
2. Which of the first-in-first sign status bits, EF, ff, and PF are determined by epxgpifflgsel. Before triggering a waveform, if the waveform uses a FIFO status bit as the jump judgment condition for DP, you should first set epxgpifflgsel.
3. intrdy flag, that is, the value of gpifradycfg.7
4. Transfer count completed
5. Specify the time delay (1-256) ifclk clock period.
Note: intrdy is a bit of a register, which is defined by the user in firmware. The tcxpire is automatically set after the GPIF is triggered and the transfer count reaches a value specified by the user. The user-defined transfer count is before the user triggers the GPIF, value assigned to gpiftcb.

Gpifdesigner/gpiftool is used to describe four waveforms by entering the 128-byte (0xe400-0xe47f) waveform descriptor.

When the waveform jumps to the idle state, the waveform ends and the corresponding done bit (gpifidlecs.7 or gpiftrig.7) is 1. When the waveform ends and enters the idle state, the GPIF signal state is set by gpifidlecs and gpifidlectl registers. Note that when a waveform is not over, you are not allowed to trigger the next waveform. Therefore, before triggering a waveform, you must determine whether the done bit is 1, only when the done bit is 1 can you start to generate the next waveform (that is, the timing of communication with the external slave ).

Each waveform consists of several States. Each State is described by a 32-bit (4-byte) State command, these four bytes are called length/branch (NDP indicates the number of ifclk clock cycles to be maintained in this state, the DP status indicates the status when the jump condition is true, the status when it is false, the status when it is false, and whether it is re-Execute. opcode (SGL = 0, use FIFO, indicates whether an interruption is triggered when this status is reached. when this status starts, whether the gpifadr [] address line automatically adds 1, and whether the Data Pointer in out FIFO points to the next data, whether to output the data indicated by the out FIFO or read the data to the current in FIFO address. The status is DP or NDP ),, logic Function (used to determine the jump condition setting of the DP state), output (used to control the output status of the CTL pin when the status is in this State ). there are two different types of States: NDP, DP

About re-Execute
When a DP state condition is met, sometimes the user defines to switch to its own State. Such a loop process is not re-execute, and we call it loop back. so what does re-Execute mean? It indicates whether other actions are executed when the DP status jumps to its own status. For example, if you set next FIFO data, that is, add 1 to the FIFO pointer, add 1 to the online address, or set the CTL to be high. After you select re-execute, when the jump is back, these actions will be executed again, so that you can implement some automatic functions.