Understanding of socket can (5) -- [initialization process of socket CAN controller]

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For general can modules, the most important step is the following two steps:

1. Configure the bit sequence of can;

2. Configure the CAN message;

Next, we will analyze the two key steps mentioned above in detail.

1. Initialization steps:

1. Step 1: Enter the initialization mode. In the can control register, set the init position to 1;

2. Step 2: In the can control register, set the CCE position to 1;

3. Step 3: Wait for the init position 1. This step is aggregated to ensure that the initialization mode is enabled;

4. Step 4: Write the bit sequence value into the BTR;

5. Step 5: Set the CCE and init positions to 0;

6. Step 6: Wait for the init bit to be cleared. This step is collected to ensure that the initialization mode has been exited;

After explaining the initialization steps of can, let's look at the code implementation:

We first initialize a bit time series constant of can.

/* Can bittiming constants as per d_can specs */

Static structcan_bittiming_const d_can_bittiming_const = {

. Name = d_can_drv_name,

. Tseg1_min = 1,/* time segment 1 = prop_seg + phase_seg1 */

. Tseg1_max = 16,

. Tseg2_min = 1,/* time segment 2 = phase_seg2 */

. Tseg2_max = 8,

. Sjw_max = 4,

. Brp_min = 1,

. Brp_max = 1024,/* 6-bit BRP field + 4-bit brpe field */

. Brp_inc = 1,

};

Initialize the can settings. After the initialization is complete, the normal mode is restored, enabling sending and receiving I/O control pins, and finally configuring the message. The Code is as follows:

Static void d_can_init (structnet_device * Dev)

{

Struct d_can_priv * priv = netdev_priv (Dev );

U32 CNT;

 

Netdev_dbg (Dev, "resetting d_can... \ n ");

D_can_set_bit (priv, d_can_ctl, d_can_ctl_swr );

 

/* Enterinitialization mode by setting the init bit */

D_can_set_bit (priv, d_can_ctl, d_can_ctl_init );

 

/* Enableautomatic retransmission */

D_can_set_bit (priv, d_can_ctl, d_can_ctl_enable_ar );

 

/* Set theconfigure change enable (CCE) bit */

D_can_set_bit (priv, d_can_ctl, d_can_ctl_cce );

 

/* Wait forthe init bit to get set */

CNT = d_can_wait_count;

While (! D_can_get_bit (priv, d_can_ctl, d_can_ctl_init) & CNT! = 0 ){

-- CNT;

Udelay (10 );

}

 

/* Setbittiming Params */

D_can_set_bittiming (Dev );

 

D_can_clear_bit (priv, d_can_ctl, d_can_ctl_init | d_can_ctl_cce );

 

/* Wait for the init bit to get clear */

CNT = d_can_wait_count;

While (d_can_get_bit (priv, d_can_ctl, d_can_ctl_init) & CNT! = 0 ){

-- CNT;

Udelay (10 );

}

 

If (priv-> can. ctrlmode & (can_ctrlmode_loopback |

Can_ctrlmode_listenonly ))

D_can_test_mode (Dev );

Else

/* Normal mode */

D_can_write (priv, d_can_ctl, d_can_ctl_eie | d_can_ctl_ie1 |

D_can_ctl_ie0 );

 

/* Enable txand rx I/O control pins */

D_can_write (priv, d_can_tioc, d_can_tioc_func );

D_can_write (priv, d_can_rioc, d_can_rioc_func );

 

/* Configuremessage objects */

D_can_configure_msg_objects (Dev );

 

/* Set a lecvalue so that we can check for updates later */

D_can_write (priv, d_can_es, lec_unused );

}

After completing steps 1 and 2, set the bit sequence parameters. The Code is as follows:

Static intd_can_set_bittiming (struct net_device * Dev)

{

Struct d_can_priv * priv = netdev_priv (Dev );

Const struct can_bittiming * bt = & priv-> can. bittiming;

U32 can_btc;

 

Can_btc = (BT-> phase_seg2-1) & 0x7) <d_can_btr_tseg2_shift;

Can_btc | = (BT-> phase_seg1 + bt-> prop_seg-1)

& 0xf) <d_can_btr_tseg1_shift;

 

Can_btc | = (BT-> sjw-1) & 0x3) <d_can_btr_sjw_shift;

 

/* Ten bitscontains the BRP, 6 bits for BRP and Upper 4 bits for brpe */

Can_btc | = (BT-> BRP-1) & 0x3f) <d_can_btr_brp_shift;

Can_btc | = (BT-> BRP-1)> 6) & 0xf) <d_can_btr_brpe_shift );

 

D_can_write (priv, d_can_btr, can_btc );

 

Netdev_info (Dev, "setting can bt = % # x \ n", can_btc );

 

Return 0;

}

 

The above content is not a part of the Linux can driver initialization process. More specifically, it is the initialization process for the CAN controller.

Reprint please indicate the source: http://blog.csdn.net/Righthek thank you!