Usage of include in Verilog

The Verilog ' include and C's include usages are the same, and the difference may lie in that point.

Include is usually a file, for Verilog This file is nothing more than a few parameter definitions, so

Here are a few more keywords: ' ifdef ' define ' endif (they all bring a point, hehe).

They unite to use, really can make your program diversification, take the Brother VGA program say things.

First, you can create a new. h file (you can create a new txt directly, and then replace the suffix with a. h) In fact, this suffix

There is no such thing as a. V is also possible, I think, written in. h more to reflect the meaning of this file.

The contents of the Lcd_para.h are as follows:

640 * 480
' Ifdef Vga_640_480_60fps_25mhz
' Define H_front ' D16
' Define H_sync ' d96
' Define H_back ' d48
' Define H_disp ' d640
' Define H_total ' D800

' Define V_front ' D10
' Define V_sync ' D2
' Define V_back ' d33
' Define V_disp ' d480
' Define V_total ' d525
' EndIf

//---------------------------------
800 * 600
' Ifdef Vga_800_600_72fps_50mhz
' Define H_front ' d56
' Define H_sync ' d120
' Define H_back ' D64
' Define H_disp ' D800
' Define H_total ' d1040

' Define V_front ' d37
' Define V_sync ' d6
' Define V_back ' D23
' Define V_disp ' d600
' Define V_total ' d666
' EndIf

//---------------------------------

' Define H_start (' H_sync + ' H_back)
' Define H_end (' H_sync + ' H_back + ' H_disp)

' Define V_start (' V_sync + ' V_back)
' Define V_end (' V_sync + ' V_back + ' V_disp)

There are two resolutions defined for the VGA,

' Define Vga_800_600_60mhz Vga_640_480_60fps_25mhz or

' Define Vga_800_600_72fps_50mhz

To see which resolution to use.

For example, my xxx.v file wants to call LCD_PARA.H,XXX.V I can write to:

' Define Vga_800_600_60mhz//This sentence should be placed on the top of "LCD_PARA.V", otherwise the compilation will not pass
' Include ' lcd_para.h

Then the xxx.v file can be used in the lcd_para.h parameters, and corresponding to the Vga_800_600_60mhz

The parameters.

Second ' include ' lcd_para.h This path is also a bit fastidious, xxx.v as a reference to lcd_para.h files

It and lcd_para.h in the same folder can write, is relative path one said. The XXX.V

Go to the seat of the Lcd_para.h file for the current path. So if they don't have a folder, write it up.

A more detailed (correct) path. By the way, lcd_para.h Tim does not add to the project is irrelevant, as long as the path

Yes, of course I'm still building add to project, and the. v files are placed in the same folder for easy observation and management.

Usage of include in Verilog