Source: Https://www.synopsys.com/dw/dwtb.php?a=hsic_usb2_device
What is HSIC?
HSIC (high-speed inter-chip) is an industry standard for USB Chip-to-chip interconnect with a 2-signal (strobe, data) sour Ce synchronous serial interface using a MHz DDR signaling to provide only high-speed (480 Mbps data rate). No external cables or connectors and hot plug-n-play is supported. There is also no analog transceivers, and hence reduces the complexity, cost, power consumption, and manufacturing risk. Low power can is achieved with 1.2 V LVCMOS signaling levels instead of the 3.3 V signaling requirement. Both data and Strobe are bi-directional utilizing NRZI encoding. In addition, HSIC interface are always operated at high speed, 480 Mbps. Hence, no high-speed chirp protocol is needed Duri Ng enumeration. Finally, HSIC USB is fully compatible with existing USB software stacks and provides all data transfer needs through a sin GLE Unified USB Software stack. For more technical information regarding the requirements to implement a HSIC USB solution, please refer to the High-sPeed inter-chip USB Electrical Specification, Version 1.0 (a supplement to the USB 2.0 specification.) which are now Availa BLE online at Http://www.usb.org/developers/docs/docs
Why HSIC?
- HSIC replaces I²c
- I²c isn ' t fast enough and requires special drivers
- HSIC allows USB software reuse
- PHY reuse/adaptation of existing PHY technologies
HSIC Device Using Synopsys USB 2.0 device Controller and HSIC PHY
USB Chip-to-chip interconnect can be achieved with the use of the both Synopsys device controller and HSIC PHY. It eliminates USB cables and connector connection down to the wires for high speed chip-to-chip communication. It also allows low power high-speed data transfers (480 Mbps) using a source-synchronous serial interface. By eliminating the need of 3.3 V signaling and 5 V short Protection logic, Synopsys HSIC PHY can offer approximately Percent lower power and percent smaller area compared to traditional USB 2.0 PHYs.
USB 2.0 HSIC PHY
- HSIC USB Version 1.0 compliance
- hsic USB Features
- Supports 8/16-bit unidirectional parallel interfaces for HS mode of operation in accordance with the utmi+ specification
- implements data recovery from serial data on the HSIC connector
- Implements sync/end-of-packet (EOP) generation and checking
- Implements bit stuffing and unstuffing, and bit-stuffing error detection
- Implements No n Return to Zero Invert (NRZI) encoding and decoding
- Implements bit serialization and deserialization
implements holding registers for staging transmit and receive data
- Implements logic to support suspend, sleep , resume, and remote wakeup operations
- general Features
- occupies Small area
- Implements low power dissipation when active, idle, or on standby
- Implements one Paralle L Data interface and clock for high-speed HSIC data transfers
- provides parameter override bits for optimal Yiel D and Interoperability
- provides on-chip PLL to reduce clock noise and eliminate the need for an external clock Generator
- provides built-in self-test (BIST) circuitry to confirm high-speed operation
- provides exte Nsive Test Interface
- Technical specification
- Small area with approx. 0.18 sq. MM (macro + pads)
- Low power
- HS transmit ~27 MW (typical)
- HS receive ~18 MW (typical)
- Suspend and Sleep modes ~4ua
- Supports 12/24/48 MHz Clock
- Initial PROCESS-TSMC 65LP
- compatability
- The HSIC PHY uses the same UTMI interface to communicate with Synopsys device controller. Since there is no well defined standard on the UTMI interface for HSIC and we had not tested the HSIC PHY with Non-synops Ys device controllers Yet, we don't guarantee that the UTMI interface of HSIC PHY would work well with that of non-synops YS device controllers.
- Availability
- Please contact Synopsys if is interested in this feature for your USB product.
USB 2.0 Device Controller with HSIC feature
- Configuration
- NEW Device Controller configuration option is available-enable HSIC support.
- HSIC logic is implemented through a ' ifdef statement. The logic would additionally is controlled by a strap pin.
- Device controller needs to is configured to support unidirectional UTMI PHY interface.
- PHY Interface Specific
- No New PIN is required-interface to Synopsys HSIC PHY for HSIC purposes. Unidirectional UTMI PHY interface is used.
- When the device controller was interfacing to Synopsys HSIC PHY, both the device controller and the PHY are of the Understa Nding not to go through the Chirp enumeration steps and rather go to high-speed idle directly.
- Application Interface/logic
- New Strap Input pin from application to enable/disable HSIC support (if the core was already configured to support HSIC THR Ough coreconsultant/rapidscript)
- This new strap input pin would not be existed if the device controller was configured not-to-support HSIC.
- Hardware Impact
- Device Controller would bypass the CHIRP enumeration stage in the Chirp_gen_state state Machin E of Udc20_speed_enum module if HSIC feature is supported.
- the bypassing of the Chirp enumeration stage would only happen if the associated strap signal is also enabled. If the strap signal is not yet enabled, the core would go through the normal chirp handshake mechanism to support non-hsic PHY.
- Firmware Impact
- No significant change is needed. Supporting high-speed falling back-to-full speed mode is no longer needed when attaching to a HSIC USB host during Enumera tion because HSIC chip-to-chip interconnect supports high-speed operation only. Hence, a high-speed only device driver is needed.
- compatability
- The device controller uses the same UTMI interface to communicate with Synopsys HSIC PHY. Since there is no well defined standard on the UTMI interface for HSIC and we had not tested the device controller with n On-synopsys HSIC PHYs Yet, we do not guarantee so the UTMI interface of device controller would work well with that of n On-synopsys HSIC PHYs.
- Availability
- Please contact Synopsys if is interested in this feature for your USB product.
USB inter-chip (HSIC) ip:what is it it? And why should I use it?
