USB Virtual Logic Analyzer, advanced trigger function of virtual logic analyzers and illustrations

LA2132, 32\64 channel G series USB Virtual Logic Analyzer has many advanced triggering functions, but many users do not use these triggering functions, the following describes the use of these features. Timing measurement: The captured data is displayed as a time series.

Introduction to LVDS:
LVDS is a low-voltage differential signal transmission, is a new technology to meet today's high-performance data transmission applications. Because it enables the system to
The supply voltage is as low as 2V, so it can also meet the needs of future applications. This technique is based on the ansi/tia/eia-644 LVDS interface standard.

   LVDS 技术拥有 330mV 的低压差分信号 (250mV MIN and 450mV MAX) 和快速过渡时间。

This allows the product to reach a high data rate from 1 Mbps to more than two Gbps. In addition, this low-voltage swing can reduce
Dissipation, with the advantages of differential transmission.
LVDS technology is used for simple line drivers and receiver physical layer devices as well as more complex interface communication chipsets.
The channel link chipset multiplexing and multiplexing slow TTL signal lines provide a narrow, high-speed, low-power LVDS interface.
These chipsets can significantly reduce the cost of the system's cables and connectors, and can decrease the physical space required for the area of the connector.
The LVDS solution offers designers new options for solving high-speed I/O interface issues. LVDS for today's and tomorrow's
High-bandwidth data transfer applications provide MW per gigabit solution.
The advantages of LVDS
LVDS offers higher immunity than single-ended technology, with higher transmission speeds, smaller signal swings, lower power consumption, and less noise than single-ended signals.
Less electromagnetic interference. Data can be transmitted at high speeds using inexpensive connectors and cables. LVDS uses standard ribbon cables and has
The IDC connector on the head PIN provides a solid signal between the chassis, board and peripherals for high-speed data transfer. Dot to point LVDS
The speed of the signal can be up to 622 MB/s.
Complex triggering structures can easily solve any difficult triggering problem. Here are a few typical trigger structures.
Delay trigger before triggering:

Pulse Width Trigger:

Count Trigger:

SPI Trigger:

I²c Trigger:

UART (RS232) Trigger:

Automatic, ordinary, single-time, data, width, delay, edge, count and many other advanced triggering methods, and the level can reach 512 levels. www.pc17.com.cn more triggers.
Another two LA-2132 are combined by a synchronous cable connection to form the LA-2164 (synchronous 64 Channels):

USB Virtual Logic Analyzer, advanced trigger function of virtual logic analyzers and illustrations