Use fdatool to generate the coefficient of IP core of FIR Filter in Xilinx

1. Enter fdatool In the MATLAB command window and press enter to open the "filter Designer & analysis tool" tool interface:

2. Click set quantization parameter in the lower left corner and set the filter arithmetic to fixed-point (fixed point. Because some FPGAs do not directly operate on floating point numbers, they can only perform numerical operations on fixed points, reference http://blog.csdn.net/gsh_hello_world/article/details/78742769 ):

3. Click design filter in the lower left corner to go to the filter parameter settings page. Set the sampling frequency (FS), passband frequency (fpass), fstop, and apass) and block band attenuation (ASTOP) parameters, and click the "design filter" button at the bottom to generate the filter coefficient

 

4. Targets-> Xilinx coefficient (. COE) file to export the CoE file. The coefficient in this file is expressed in hexadecimal notation of a fixed point. Each Data Length is 16 bits (determined by numerator word length ), it shifts the actual floating point data by 17 bits (by numerator Frac. for example, if the first coefficient of the actual floating point data is 0.001, the fixed point is 0x0081 (INT) 0.001*2 ^ 17 = 131 = 0x0081, that is to say, 0.001 shifted to 17 places ):

5. You can also click File-> export to export the filter coefficient to the workspace of MATLAB. Press Ctrl + e to export the actual floating point data:

 

6. Follow the steps to generate an IP core. Blog: http://blog.csdn.net/weiweiliulu/article/details/40151053
---------------------
Gao shihao
Source: csdn
Original: 78746054
Copyright Disclaimer: This article is an original article by the blogger. For more information, see the blog post link!

Use fdatool to generate the coefficient of IP core of FIR Filter in Xilinx