Using Jink Debug program, Time-barred solution

Source: Internet
Author: User

A few days ago, to do engineering, encountered the use of Jlink SWD mode debugging procedures, timer delay is not the problem, the Internet search a lot, and finally found the problem, thanks to omnipotent netizens. The wrong time is due to the Keil setup problem.

The following is the transfer from netizens:

First, talk about the simulation mode SWD and JTAG difference
(1) SWD mode is more reliable than JTAG in high-speed mode. in the case of large data volumes, the JTAG downloader fails, but the chances of SWD happening are much smaller. The basic use of JTAG emulation mode is that you can use the SWD mode directly, as long as your emulator supports it. so we recommend that you use this mode.
(2)when the Gpio is just missing, you can use the SWD emulation, which supports fewer pins.
(3)when the size of the board is limited, it is recommended to use the SWD mode, it requires less pins, of course, the PCB space will be small! For example, you can choose a small 2.54-pitch 5-pin terminal to do the simulation interface.

Twocommon emulator on the market support for SWD mode
(1) JLINKV6 supports SWD emulation mode,The speed is relatively slow.
(2) JLINKV7Better support for the SWD simulation mode, the speed has been significantly improved, the speed is JLINKV6 6 times times.
(3) JliNKV8 very good support for the SWD simulation mode, speed can be up to 10M.
(4) ULINK1SWD mode is not supported.
(5)piracy ULINK2 very good support for SWD mode,speed can reach 10M.
(6)Genuine ULINK2 very good support for SWD mode,speed can reach 10M.


Three, STM32 the SWD configuration method when debugging
(1)1->2->3->4 respectively, click Setting to enter Debug
<ignore_js_op>

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(2) in 1 Select sw,2 seemingly set to 10MHZ comparison, click on the top left trace
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(3) 1->2->3->4 (4th step without change), the 2nd step is the key, click into the Flashdoanload
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(4) for 1->2->3, the 3rd step is the key, which needs to be added according to the chip used. Click OK, complete
<ignore_js_op>

Image4.png (72.86 KB, download number: 0)

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Note: The kernel clock frequency can be changed on the trace page only if SW is selected on the Debug page. It's interesting to change the clock frequency and hook off the Enable option. Back to the Debug page to change the SW to Jtag, after saving the same can make the simulation time is correct. Original website: http://www.eefocus.com/lee13076091101/blog/15-10/320861_57a54.html

Using Jink Debug program, Time-barred solution

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