Viewpoint: Comprehensive Analysis of vswitch backboard bandwidth

There are many things worth learning about vswitches. Here we mainly introduce the bandwidth of vswitches. The bandwidth of A vswitch backboard is the maximum amount of data that the processor, interface card, and data bus can process.

The backboard bandwidth indicates the total data exchange capability of a vswitch. The unit is Gbps. It is also called the switching bandwidth. The bandwidth of A vswitch generally ranges from several Gbps to hundreds of Gbps. The higher the bandwidth of A vswitch backboard, the stronger the ability to process data, but the higher the design cost. Generally, the calculation method is as follows:

1) wire speed backboard bandwidth
The Technical Forum examines the total bandwidth available for all ports on the vswitch. The formula is as follows: number of ports * corresponding port rate * 2 full duplex mode) if the total bandwidth is less than or equal to the nominal backboard bandwidth, the bandwidth is linear.

2) Layer 2 packet forwarding speed
Layer 2 packet forwarding rate = number of Gigabit ports x 1. 488 Mpps + 0.1488 MB port count * Mpps + number of other types of ports * Calculation Method. If this rate can be less than or equal to the forwarding rate of a nominal L2 packet, the switch can achieve the line speed when performing Layer 2 switching.

3) Layer 3 packet forwarding speed
Technical Forum Tier 3 packet forwarding rate = gigabit port count × 1. 488 Mpps + 0.1488 MB port count * Mpps + number of other types of ports * Calculation Method. If this rate can be less than or equal to the forwarding rate of a nominal three-tier packet, the switch can achieve line speed when performing layer-3 switching. So how does 1.488Mpps get it?

The packet forwarding speed is measured by the minimum number of packets that send 64 bytes in a unit of time. For Gigabit Ethernet, the calculation method is as follows: 1,000,000,000 bps/8bit/64 + 8 + 12) byte = 1,488,095 pps Description: When the Ethernet frame is 64 bytes, the fixed overhead of the frame gap between 8-byte frames and 12-byte frames must be considered. Therefore, the packet forwarding rate of A 1-gigabit Ethernet port when forwarding a 64-byte packet is 1.488 Mpps. The line-rate port forwarding rate of Fast Ethernet is exactly 148.8 of that of Gigabit Ethernet, which is kpps.

◆ For 10-Gigabit Ethernet, the packet forwarding rate of a wire speed port is 14.88 Mpps;
◆ For Gigabit Ethernet, the packet forwarding rate of a wire speed port is 1.488 Mpps;
◆ For fast Ethernet, the packet forwarding rate of a wire speed port is 0.1488 Mpps;
◆ For the POS port of the OC-12, the packet forwarding rate of a wire speed port is 1.17 Mpps;
◆ For the POS port of the OC-48, the packet forwarding rate of a wire speed port is 468 MppS;

Therefore, if the above three conditions can be met, we will say that this switch truly achieves linear non-blocking. The bandwidth usage of the vswitch backboard is closely related to the internal structure of the vswitch. The internal structure of a vswitch is as follows:

The first is the shared memory structure, which relies on the central exchange engine to provide high-performance connections across the port. The core engine checks each input packet to determine the route. This method requires a lot of memory bandwidth and high management costs. Especially with the increase of switch ports, the price of the central memory will be very high, so the switch kernel becomes a bottleneck for performance implementation;

The second is the cross-bus structure, which can establish direct point-to-point connections between ports, which is good for single-point transmission performance, but not suitable for multi-point transmission;

The third is the hybrid cross-bus structure. This is a hybrid cross-bus implementation method. Its design idea is to divide the integrated cross-Bus Matrix into small cross matrices, it is connected through a high-performance bus. The advantage is that the number of Cross buses is reduced, the cost is reduced, and the bus contention is reduced. However, the bus connected to the cross matrix becomes a new performance bottleneck. However, how can we check whether the bandwidth of A vswitch backboard is sufficient? Generally, we should consider the following two aspects:

1) The sum of the port capacity multiplied by the number of ports should be 2 times smaller than the vswitch's backboard bandwidth. This will enable full-duplex non-blocking switching and prove that the vswitch has the conditions to maximize the data exchange performance.
 
2) Full configuration throughput Mpps) = Full Configuration Port count × 1. 488 Mpps. The theoretical throughput of One gigabit port when the packet length is 64 bytes is 1.488 Mpps. For example, A vswitch that can provide up to 64 Gigabit ports must have a full configuration throughput of 64 × 1.488 Mpps = 95.2 Mpps to ensure that all ports are working at the same speed, provides non-blocking packet switching. If a vswitch can provide up to 176 Gigabit ports, the declared throughput is less than 261.8Mpps176 × 1. 488 Mpps = 261.8 Mpps), the user has reason to think that the switch adopts a blocking structure design. Generally, the switches that both meet the requirements are qualified switches.

The bandwidth usage of the vswitch backboard is closely related to the internal structure of the vswitch. Currently, the internal structure of a vswitch mainly includes the following types: first, the shared memory structure, which relies on the central switching engine to provide high-performance connections across all ports, the core engine checks each input packet to determine the route. This method requires a lot of memory bandwidth and high management costs. Especially with the increase of switch ports, the price of the central memory will be very high, so the switch kernel becomes a bottleneck for performance implementation; the second is the cross-bus structure. It can establish direct point-to-point connections between ports, which is good for single-point transmission performance, but not suitable for multi-point transmission. The third is the hybrid cross-bus structure, this is a hybrid cross-bus implementation method. Its design idea is to divide an integrated cross-Bus Matrix into small cross matrices and connect them through a high-performance bus in the middle. The advantage is that the number of Cross buses is reduced, the cost is reduced, and the bus contention is reduced. However, the bus connected to the cross matrix becomes a new performance bottleneck.

"Currently, all backboards adopt passive design. Backplane bus technologies include LVDS, LVTDL, and GLT. For low-speed and medium-speed systems such as 2.5 Gbit/s and 2.5 Gbit/s, because the system capacity is not very large and the system bottleneck is not in the backplane bus, there is no strict requirement on the backplane bus speed, generally, LVTDL or GLT technology is used. The backplane bus is 77 Mbit/s or 38 Mbit/s, which fully meets the requirements of the system. If LVDS low-voltage differential signal is used, the bus speed of the backboard is increased to 622 Mbit/s, which has little effect on the system except for the convenience of Backboard wiring. For high-speed communication systems, such as 10 Gbit/s or above, the system speed and cross capacity are very high, which puts forward higher requirements on the speed and wiring of the backplane bus, therefore, LVDS is generally used. Currently, the backboard speed in the industry is generally 622 Mbit/s or 777 Mbit/s ."