Vivado generates MCS

Tcl Console inside execution

Write_cfgmem-format mcs-interface spix4-size 128-loadbit "up 0 e:/x.bit"-file X.mcs

FFor Cfgbvs and Config_voltage as:

Set_property cfgbvs Vcco [current_design]

Set_property config_voltage 2.5 [current_design]

The options for CFGBVS is VCCO or GND.

The options for Config_voltage is 1.8/2.4/3.3

1.SPI Flash constraints
Here the SPI Flash constraint is a constraint on the n25q128a13bsf40e SPI Flash for the Boland M7 motherboard

Set_property cfgbvs VCCO [current_design]
Set_property config_voltage 3.3 [current_design]
Set_property BITSTREAM.GENERAL.COMPRESS true [Current_design]
Set_property bitstream. CONFIG. Configrate [Current_design]
Set_property bitstream. CONFIG. Spi_buswidth 4 [Current_design]
Set_property bitstream. CONFIG. Spi_fall_edge Yes [Current_design]

2.BPI Flash

Here BPI Flash is a constraint on VC707 's pc28f00ag18fe BPI Flash

Set_property bitstream. CONFIG. Configrate [Current_design]
Set_property bitstream. CONFIG. Bpi_sync_mode Type1 [Current_design]
Set_property bitstream. CONFIG. Extmastercclk_en Div-1 [Current_design]
Set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]
Set_property bitstream. CONFIG. Unusedpin Pullup [Current_design]
Set_property Config_mode BPI16 [current_design]
Set_property cfgbvs GND [current_design]
Set_property config_voltage 1.8 [Current_design]

Vivado generates MCS