I think it is necessary to summarize the following points:
When I first read SV, I found that it was a bit interesting, but Sv is just a language. How can I apply it to the verification service, we need to rely on verification methods such as vmm or OVM. Therefore, what is the purpose of vmm or OVM? We need to learn.
What makes vmm powerful is that it inherits some advantages of SV, such:
1. Use the concept of classes to build reusable test environments;
2. Powerful random control, which can generate many random test vectors under Constraints and construct many unexpected situations, so as to easily detect bugs that are not easy to detect;
3. The function coverage unique to SV can ensure that all function points you want to test are tested in the test case.
OVM architecture is more suitable for reusable tests than vmm, because OVM architecture is clearer and easier to maintain than vmm architecture.
Some people also mentioned the advantages of vmm and the following points:
1) Use channel to replace the SV mailbox, and components can communicate more conveniently (the ovm tlm is more powerful );
2) Replacement of SV event with Y is more reliable;
3) use the built-in message management instead of $ display, which is more powerful;
4) Various generator to facilitate various incentives (OVM sequencer is more powerful );
5) ral provides more powerful register read/write functions;
6) callback can change component's behavior without modifying testbench (OVM's factory function is more powerful ).
In addition:
1) Use methodology to ensure consistency of verification platforms built by different verification engineers, so that non-verification platform developers can read and maintain them. If no verification methodology is used, the leader of the verification team is miserable, mutual check, X-check, verification platform construction, and test case compilation are implemented by different persons, and verification platform construction and maintenance are implemented by different persons, which wastes a lot of manpower costs;
2) use a vmm macro to easily generate components, such as generator and transaction.
3) use a fixed format for vmm_env and vmm_xactor, verification engineers should consider the implementation of functions rather than the architecture of the verification platform.
4) The use of methodology can reduce a large amount of comments (and it is legal, you can add no comments in vmm_env, and the leader cannot say anything. If there is no methodology, more than 20% of the comments are required ).