VxWorks support for Nand

I,
Introduction to NAND/nor flash
Nor and NAND are two major non-loss flash technologies on the market. Intel first developed nor Flash technology in 1988, which completely changed the previous situation where EPROM and EEPROM were integrated. Next, in 1989, Toshiba published the NAND Flash structure, emphasizing reducing the cost per bit, providing higher performance, and easily upgrading through interfaces like disks. Its capacity can reach more than 1 GB, And the write and erase speed is very fast, it is more suitable for data storage.
Nor flash storage unit block, usually 64 K ~ 128 K. The block is also the unit of erasure.
The storage unit of NAND Flash is page and block. The block is still the erased unit, and the page is the management unit of the bad fan. Each block contains several pages, usually 32 pages. Each page is divided into the primary data zone and the additional data zone (extra). If an EDC/ECC validation error occurs in the primary data zone, you can record errors in the additional data area. The primary data zone and the additional data zone use different command words for reading/writing. Therefore, the primary data zone and the additional data zone have the same starting address. There are two common types of page sizes: one is 512 bytes ("Small page" for short), physically divided into two 256-byte primary data areas, the last is the 16-byte spare space (spare). The "Small page" mode is mostly used for chips smaller than MB; most chips larger than 2048 MB use 2 k pages ("big pages"), and the additional data area is no longer 16 bytes, but bytes.
L Performance Comparison
Flash flash memory is a non-loss-prone memory. You can erase and re-program the memory unit blocks. Write operations on any flash device can only be performed in an empty or erased unit. In most cases, the flash device must be erased before writing. The erasure unit of the nor device is large, usually 64 ~ Blocks of Kb are erased in seconds. Generally ~ 3 seconds; the disk erasure unit of the NAND device is smaller than the nor unit, which is generally 8 ~ For 32 KB blocks, it takes up to 4 ms to perform the same operation.
Nor reads much faster than NAND. The nor flash can be directly read as memory without the need for special address ing for reading the nor device.
Nand writes much faster than nor.
The 4 Ms erasure speed of NAND is far faster than nor.
L Interface difference
Nor Flash has an SRAM interface and enough address pins to address it, so it can easily access every byte in it. The nor-based flash memory can be used very directly, and can be connected like other memory, and code can be directly run on it
Nand devices use complex I/O ports to access data in a serial manner. Different products or vendors may use different methods. Eight pins are used to transmit control, address, and data information.
Nand read and write operations use 512 bytes of blocks, which is a bit like hard disk management. Naturally, NAND-based memory can replace hard disks or other Block devices.
Due to the need for I/O interfaces, Nand is much more complicated. When using the NAND device, you must first write the driver to continue other operations. Writing information to a NAND device requires considerable skill, because designers must not write information to Bad blocks, which means virtual ing must be performed from beginning to end on the NAND device.
L capacity and cost
The unit size of NAND Flash is almost half the size of the nor device. Because the production process is simpler, the NAND structure can provide a higher capacity within the given mold size, thus reducing the price accordingly.
Nor flash occupies 1 ~ Most of the 16 MB flash memory market, while NAND Flash is only used in 8 ~ Among the MB products, this also shows that nor is mainly used in the code storage medium, and NAND is suitable for data storage, nand shares a large share in the compactflash, secure digital, PC cards, and MMC memory cards markets.
L reliability and Durability
When Using Flash Media, reliability is a key issue to be considered. Flash is a suitable storage solution for systems that need to expand MTBF. The reliability of nor and NAND can be compared in terms of life (durability), bit switching and bad block processing.
L life (durability)
In nand flash memory, the maximum number of writes to each block is 1 million, while that of nor is 100,000. In addition to having a block erasure cycle of 10 to 1, the typical NAND block size is eight times smaller than that of the nor device, each NAND storage block is deleted less frequently within a given period of time.
L-bit Switching
All flash devices are plagued by bit switching. In some cases, a bit may be reversed or reported to be reversed. Nand occurs more often than nor. If there is only a report problem, it may be solved if you read the report several times ., If this bit changes, you must use the error detection/error correction (EDC/ECC) algorithm. The problem of bit inversion is more common in nand flash memory. The NAND supplier recommends using the EDC/ECC algorithm when using nand flash memory.
This problem is not fatal when using NAND to store multimedia information. Of course, if you use a local storage device to store operating systems, configuration files, or other sensitive information, you must use the EDC/ECC system to ensure reliability.
L Bad Block Processing
Nor does not have a bad block problem, so neither the nor driver considers Bad Block Processing.
Bad blocks exist in the NAND device, and the bad blocks are randomly distributed. I have tried to eliminate bad blocks before, but I found that the yield rate is too low and the cost is too high. So far, no effective methods have been completely eliminated.
The NAND device needs to initialize the media to detect Bad blocks and mark them as unavailable. In an existing device, a high failure rate may occur if this processing is not performed in a reliable way.
II,Existing methods supported by VxWorks

The description of tffs in vxworks_kernel_programmers_guide_6.6.pdf is as follows:

Including the translation layer component

Choose the Translation Layer appropriate to the technology used by your flash

Medium. The main variants of Flash devices are nor and NAND. trueffs

Provides support:

■ Nor devices.

■ NAND devices that conform to the ssfdc specification.

From the description of the NAND part, only NAND Flash devices that comply with the ssfdc standard are supported. In history, vxworks5.4 once supported nftl's Translation Layer. Later versions do not know what the purpose is and are no longer supported. Both nftl and ssfdc support the "small page" mode.
By the way, in Linux,Yaffs supports the "small page" mode, and yaffs2 and jffds2 support the "large page" mode.
The following two sections will discuss nftl and ssfdc separately.
III,Ssfdc
The concept of ssfdc originated from the SM (smartmedia) card, a flash memory storage card released by Toshiba in November 1995. Samsung purchased a production and sales license in 1996, the two companies have become major smcard manufacturers. To promote smartmedia to become an industrial standard, the ssfdc Forum (ssfdc is the solid state floppy disk card) was established in. In fact, smartmedia was called ssfdc in and renamed smartmedia in, and become a registered trademark of Toshiba ). The ssfdc forum has more than 150 members, including many major vendors, such as Sony, sharp, JVC, Philips, NEC, and SanDisk.
Ssfdc defines a set of strict standards, including hardware specifications, software design, electrical characteristics and so on, the specific content can go to ssfdc Forum http://www.ssfdc.or.jp/cgi-bin/submit_dl2.cgi? Form_name = spe2 download.
The ssfdc standard is not much different from the standard NAND. It is a primary data zone plus an additional data zone model. What generates an image for the software is its definition of the block size.
When the flash size is less than 2 MB, each sector contains two pages. When the flash size is between 4 MB and 16 MB, each sector contains one page. When the flash size is greater than 32 MB, every 32 MB is managed as a zone.
Zone is not supported in the default VxWorks code, and the maximum value is 16 Mb. You can add macro include_tl_ssfdc in config. h or enable corresponding components in the IDE environment.
Ssfdc limits the flash size in the Code. If you are familiar with ssfdc, you can modify it to support larger flash space.
1. determine the size of formatssfdc and mountssfdc.
The total number of units that can be managed is limited in both functions, as shown in the following code. This code exists in both functions.

Vol. virtualsectors = vol. sectorsperunit;

If (vol. noofunits <500)

Vol. virtualsectors * = 250;
/* 1 Mbyte Chip
*/

Else if (vol. noofunits <1000)

Vol. virtualsectors * = 500;
/* 2 or 4 Mbyte Chip
*/

Else

Vol. virtualsectors * = 1000;
/* 8 0r 16 Mbyte Chip
*/
The main intention is to limit the number of manageable units to no more than 1000, because the blockaddress given in the spare area only has two bytes. Although blockaddress has two parts, according to ssfdc, the two parts are backup relationships and cannot be used together. In addition, there are only 10 available status bits in both 16 bytes. That is to say, theoretically, the block can only address 1024 blocks. When the number of blocks is greater than 1024, unit repetition occurs.
2. physical2virtual determines the address.
Physical2virtual is the function responsible for address translation in ssfdc. The address processing in this function is "crude". According to the standard, 1 to 10 bits should be used here, A total of 10 digits indicates 1024 values. However, our Code removes one bit and makes it an 11 bit. Therefore, adding a vol. virtualsectors * = 2000 in formatssfdc and mountssfdc can run without modifying other content.
To support a larger space, the following shift operation must be processed. According to the standard, 16 bits are used for the address, except the forward bits (0 bits) used for the status, other BITs are not used.
Static unitno physical2virtual (ssfdc vol, unitno, int addressareano)
{
...

/* Virtual address is in bits 1 through 11 */

Virtualunitno <= 4;

Virtualunitno> = 5;


Return virtualunitno;
}
IV,Nftl
Nftl is only supported in vxworks5.4. To use nftl's Translation Layer in the product, you need to port it from vxworks5.4.
First, copy SRC \ tffs \ nftllite. C to the project directory and modify the makefile to compile. Modify the tltable table in tffsconfig. C and add one:
# Ifdef
Include_tl_nftl
# Ifdef
Format_volume

{Mountnftl, formatnftl },
# Else

Mountnftl,
# Endif
/* Format_volume */
# Endif
/* Include_tl_nftl */
Unlike the nor driver, the NAND Flash Driver needs to process some mode fields for flash read/write, which can be ignored in the nor flash. Mode appears in reading/writing functions. There are three modes: Extra indicates that the data to be read and written is in the additional data zone (that is, the spare zone); 0 indicates that the read and write data is in the primary data zone; EDC indicates that the read and write data is in the primary data zone, but EDC/ECC verification is required for the data after the operation is completed. If it is a write operation, you also need to write 0 x 5th to 6 bytes in the additional data zone.
Nftl has a size limit of 2047 MB for flash like nor, but when there are a large number of blocks, nftl will automatically combine several blocks into one. This is because most NAND Flash ensures that the first and second blocks are not bad blocks. nftl needs to write some key data in the first two blocks, the so-called key data is actually a brief description of each block within the management scope. Each block occupies one byte here, and the first two blocks are backup relationships, when the number of blocks exceeds the number of bytes in the block, nftl automatically combines the two blocks into one. The nftl structure of NAND Flash is different from that of nor flash. FTL has an unitheader in the header of each block, which records the tffs configuration information, you can read all tffs configurations as long as you find any one. Nftl blocks are only used to record data, and data attributes are recorded in their respective additional data areas. To obtain the configuration information, you must find the first block of NAND Flash.