Wang Shuang The third edition of the assembly language Second chapter register

CPU Overview

A typical CPU consists of an operator, a controller, a register, and other devices that are connected by an internal bus.
The internal bus realizes the connection between each device inside the CPU, and the external bus realizes the connection between the CPU and other devices on the motherboard.

8086CPU has 14 registers their names are: AX, BX, CX, DX, SI, DI, SP, BP, IP, CS, SS, DS, ES, PSW.

2.1 General-Purpose registers

8086CPU all registers are 16-bit and can hold two bytes.

8086 registers in the previous generation of CPUs are 8-bit;
To ensure compatibility, these four registers can be divided into two separate 8-bit registers for use.
1.AX can be divided into Ah and al;
2.BX can be divided into BH and BL;
3.CX can be divided into ch and cl;
4.DX can be divided into DH and DL.

Storage of 2.2 words in registers

2.3 Several assembly instructions

2.4 Physical Address

The address of the memory unit to be given when the CPU accesses the memory unit. All memory units consist of a one-dimensional linear space, and this unique address is called a physical address.

2.5 CPU with 16-bit structure

In summary, a 16-bit structure describes a CPU that has the following characteristics:
1, the operator can handle up to 16 bits of data at a time.
2, the maximum width of the register is 16 bits.
3, the path between the register and the operator is 16 bits.

2.6 8086CPU How to give a physical address

8086 has 20-bit address bus, can transmit 20-bit address, the addressable capacity is 1M.

8086 internal is a 16-bit structure, it can only transfer 16-bit address, showing the capacity of addressing is only 64K.

　　

2.7 "segment address x16+ offset address = Physical Address" the essential meaning

Concept of paragraph 2.8

Memory is not segmented, the segment is divided from the CPU, because 8086CPU with "(segment address x16) + offset address = Physical Address" to give the physical address of the memory unit, so that we can use a segmented way to manage memory.

Segment Address x16 must be a multiple of 16, so the starting address of a segment must also be a multiple of 16.
The offset address is 16 bits and the 16-bit address has a 64K addressing capacity, so the length of a segment is 64K maximum.

2.9 Segment Registers

The segment register is the one that provides the segment address.
8086CPU has 4 segment registers: CS, DS, SS, ES

2.10 CS and IP

CS and IP are the most critical registers in 8086CPU, and they indicate the address at which the CPU is currently reading instructions.
1.CS is the code segment register;
2.IP is the instruction pointer register.

(1) from the Cs:ip point to the memory unit read instruction, read the instruction into the command buffer;
(2) IP = IP + The length of the instruction read, thus pointing to the next instruction;
(3) Execution instructions. Go to step (1) and repeat the process.

CS and IP are set to cs=ffffh,ip=0000h after 8086CPU power on or reset (that is, when the CPU is just starting to work).

Can not change the value of CS, IP through the MOV instruction, only can be modified by the special instruction JMP, JMP Register means only modify the IP value.

2.12 Code Snippets

The CPU only recognized that the contents of the memory unit pointed to by the cs:ip are directives, so the cs:ip points to the first address in the defined code snippet.

Debug command:

R command to view and change the contents of the CPU register;
d command to view the contents in memory;
The e command overwrites the contents of the memory;
The U command translates the machine instructions in memory into assembly instructions;
T command executes a machine instruction;
A command writes a machine instruction in memory in the format of the assembly instruction.

Reference: "Small Turtle Collection 0 Basic Primer"

The third edition of Assembly language

Wang Shuang The third edition of the assembly language Second chapter register