Single chip multiprocessor (Chip multiprocessors, referred to as CMP), also refers to multiple cores. CMP is proposed by Stanford University, the idea is to integrate the SMP (symmetric multiprocessor) in the large-scale parallel processor into the same chip, each processor executes different processes in parallel. Compared with CMP, the flexibility of SMT processor structure is more outstanding. However, when the semiconductor process enters 0.18 microns, the line delay has exceeded the gate delay, requiring the microprocessor to be designed by dividing many smaller, locally better basic unit structures. In contrast, since the CMP structure has been divided into several processor cores to design, each core is relatively simple, conducive to optimal design, and therefore more promising. At present, both IBM's power 4 chip and Sun's MAJC5200 chip have adopted the CMP structure. Multi-core processors can share caching within the processor, improve cache utilization, and simplify the complexity of multiprocessor system design.
New processors from Intel and AMD will also be incorporated into the CMP structure in the second half of 2005. Xinan Processor Development code for the Montecito, the use of dual-core design, with a minimum of 18MB in-chip cache, to take 90nm process manufacturing, its design is definitely called the current chip industry challenges. Each of its individual cores has a separate L1,L2 and L3 cache, containing about 1 billion transistors.