What is Fermi? (3)

 

New gf100 unit, GPC Architecture

 

GPC Architecture Analysis

As described above, the gf100 core consists of four groups of GPC (graphics processing clusters, graphics processing cluster. Next, let's take a closer look at how the internal architecture of this new GPC unit is designed.

Logic architecture of GPC Unit

Each GPC includes a raster engine (raster engine, yellow horizontal bar on the top) and a maximum of four groups of Sm (streaming multiprocessors. In this paper, we will use the SM array for short and will not repeat it) arrays. Note that each GPC can contain up to four sm arrays. NVIDIA will cut down the SM units in the GPC as needed. For example, in the gtx480 core, a group of SM arrays in GPC is removed, that is, three of them have four sm arrays, there are only three SM arrays in the other GPC group.

GPC is an important module of gf100 and the first concept introduced by NVIDIA in a unified architecture product. In each GPC, a raster engine is added ). In addition,Almost all GPC can be considered as a complete GPU core, because each GPC includes the ability to process fixed points, ry, grating, texture, and pixels.. It can be said that, apart from the drop-down function, GPC can almost complete most of the graphic processing work. It would be very easy for NVIDIA to cut down the overall GPC. We guess this will be very beneficial to the division of the product line architecture.

 

Advantages of GPC Design

Almost equivalent to the GPC part of a single GPU, each gf100 core has four groups. In this way, it is quite easy for NVIDIA to re-adjust its core architecture in the middle-end, swap-level, and entry-level graphics cards.

Because NVIDIA only needs to adjust the number of GPC, it can almost complete the division of different levels of graphics cards. In the specific structure of each series of products, NVIDIA can cut down the SM array according to the product yield rate in a timely manner. In this way, NVIDIA not only divides the product line into more details, but also indirectly improves the wafer yield rate.

NVIDIA product reduction in the future

Some readers may say that NVIDIA's original SM array shielding method does not play a hierarchical role? Yes, if NVIDIA's design philosophy remains in the gt200 era, the original classification method is indeed effective, but after introducing the brand new raster engine and the polymorph engine, the method for blocking SM arrays alone is obviously not that appropriate.