What's edid?

Extended display identification data (coming from http://en.wikipedia.org)

Extended display identification data(Edid) Is a data structure provided by a computer display to describe its capabilities to a graphics card. it is what enables a modern personal computer to know what kind of monitor is connected. edid is defined by a standard published by the Video Electronics Standards Association (VESA ). the edid provided des manufacturer name, product type, phosphor or filter type, timings supported by the display, display size, luminance data and (for digital displays only) pixel mapping data.

Edid structure 1.0 was defined in 1994; version 1.1 followed in 1996, then 1.2, and 1.3 in 2000. all these define upwards compatible 128 byte structures. edid structure 2.0 defines a new 256-byte structure.

The channel for transmitting the edid from the display to the graphics card is usually the i² C bus. the combination of edid and i² C is called the display data channel version 2, or ddc2. the 2 distinguishes it from VESA's original DDC, which used a different serial format.

Before DDC and edid were defined, there was no standard way for a graphics card to know what kind of display device it was connected. some VGA connectors in personal computers provided a basic form of identification by connecting one, two or three pins to ground, but this coding was not standardized.

The edid is often stored in the monitor in a memory device called a serial prom (programmable read-only memory) or EEPROM (Electrically Erasable prom) that is compatible with the i² C bus.

Software packages can read and display the edid information, such as read-edid and PowerStrip for Microsoft Windows and read-edid and xfree86 (which will output the edid to the log if verbose logging is on (startx ---logverbose 6 )) for Linux and bsd unix. mac OS X natively reads edid information (see/var/log/system. log or hold down cmd-V on startup) and programs such as switchresx or displayconfigx can display the information as well as use it to define custom resolutions.

Contents [Hide] 1 enhanced edid (E-EDID) 1.1 edid extensions assigned by VESA 2 limitations 3 edid 1.1 Data Format 4 external links

[Edit] enhanced edid (E-EDID)

Enhanced edid is based on the edid version 1.3, but offers support of extensions, which enable edid 2.0 to be supported as an extension. data fields for preferred timing, range limits, monitor name are required in E-EDID. e-EDID also supports dual GTF, standard timings aspect ratio change.

With the use of extensions, E-EDID string can be lengthened up to 32kibytes.

[Edit] edid extensions assigned by VESA

• Timing extension (00 h)
• Video timing Block Extension (VTB-EXT) (10 h)
• Edid 2.0 extension (20 h)
• Display Information extension (DI-EXT) (40 h)
• Localized string extension (LS-EXT) (50 h)
• Microdisplay interface extension (MI-EXT) (60 h)
• Display transfer characteristics data block (dtcdb) (a7h, AFH, BFH)
• Block map (f0h)
• Display Device data block (dddb) (FFH)
• Extension defined by monitor manufacturer (FFH): According to LS-EXT, actual contents varies from manufacturer. However, the value is later used by dddb.

[Edit] limitations

Some graphics card drivers have historically coped poorly with the edid, using only its standard timing descriptors rather than it's detailed timing Descriptors (dtds ). even in cases where the dtds were read, the drivers are/were still often limited by the standard timing descriptor limitation that the horizontal/vertical resolutions must be evenly divisible by 8. this means that your graphics cards cannot express the native resolutions of the most common wide screen flat panel displays and liquid crystal display televisions. the number of vertical pixels is calculated from the horizontal resolution and the selected aspect ratio. to be fully expressible, the size of wide screen display must thus be a multiple of 16 × 9 pixels. for 1366 × 768 pixel wide XGA panels the nearest resolution expressible in the edid standard timing descriptor syntax is 1360 × 765 pixels. specifying 1368 pixels as the screen width wocould yield an unnatural screen height of 769.5 pixels.

Invalid wide XGA panels do not advertise their native resolution in the standard timing descriptors, instead offering only a resolution of 1280 × 768. some Panels advertise a resolution only slightly smaller than the native, such as 1360 × 765. for these panels to be able to show a pixel perfect image, the edid data must be ignored by the display driver or the driver must correctly interpret the DTD and be able to resolve resolutions whose size is not divisible by 8. special programs are available to override the standard timing descriptors from edid data; PowerStrip for Microsoft Windows and displayconfigx for Mac OS X

[Edit] edid 1.1 Data Format

Byte sequence
00–07: Header information
08–17: Complete serial number
  08–09: Manufacturer ID
  10–11: Product ID Code (little-endian)
  12–15: Serial Number (little-endian)
  16: Week of Manufacture
  17: Year of Manufacture.  Add 1990 to the value for actual year.
18: EDID Version Number
19: EDID Revision Number
20-24: Basic Display Parameters
  20: VIDEO INPUT DEFINITION
    bit 7: 0=analog, 1=digital
    if bit 7 is digital:
      bit 0: 1=DFP 1.x compatible
    if bit 7 is analog:
      bit 6-5: video level
       00=0.7, 0.3, 01=0.714, 0.286, 10=1, .4 11=0.7, 0
      bit 4: blank-to-black setup
      bit 3: separate syncs
      bit 2: composite sync
      bit 1: sync on green
      bit 0: serration vsync
  21: Maximum Horizontal Image Size (in centimeters).
  22: Maximum Vertical Image Size (in centimetres).
  23: Display Gamma.  Divide by 100, then add 1 for actual value.
  24: Power Management and Supported Feature(s):
    bit 7: standby
    bit 6: suspend
    bit 5: active-off/low power
    bit 4-3: display type.
      00=monochrome, 01=RGB colour, 10=non RGB multicolour, 11=undefined
    bit 2: standard colour space
    bit 1: preferred timing mode
    bit 0: default GTF supported
25-34: CHROMA INFO
  25: low significant bits for Red X (bit 7-6), Red Y (bit 5-4), Green X (bit 3-2), Green Y (bit 1-0).
  26: low significant bits for Blue X (bit 7-6), Blue Y (bit 5-4), White X (bit 3-2), White Y (bit 1-0).
  27–34: high significant bits for Red X, Red Y, Green X, Green Y, Blue X, Blue Y, White X, White Y.
  To decode actual value, rearrange bits as follows:
  High significant bits 7-0 for (channel), low significant bits for (channel).
    Actual value is between 0.000 and 0.999, but encoded value is between 000h and 3FFh.
35: ESTABLISHED TIMING I
  bit 7-0: 720×400@70 Hz, 720×400@88 Hz, 640×480@60 Hz, 640×480@67 Hz,
           640×480@72 Hz, 640×480@75 Hz, 800×600@56 Hz, 800×600@60 Hz
36: ESTABLISHED TIMING II
  bit 7-0: 800×600@72 Hz, 800×600@75 Hz, 832×624@75 Hz, 1024×768@87 Hz (Interlaced),
           1024×768@60 Hz, 1024×768@70 Hz, 1024×768@75 Hz, 1280×1024@75 Hz
37: Manufacturer's Reserved Timing
38–53: Standard Timing Identification.  2 bytes for each record.
  First byte
    Horizontal resolution.  Multiply by 8, then add 248 for actual value.
  Second byte
    bit 7-6: Aspect ratio.  Actual vertical resolution depends on horizontal resolution.
      00=16:10, 01=4:3, 10=5:4, 11=16:9
    bit 5-0: Vertical frequency.  Adds 60 to get actual value.

54–71: Descriptor Block 1
  54–55: Pixel Clock (in 10 kHz) or 0
  If Pixel Clock is non null:
    56: Horizontal Active (in pixels)
    57: Horizontal Blanking (in pixels)
    58: Horizontal Active high (4 upper bits)
        Horizontal Blanking high (4 lower bits)
    59: Vertical Active (in pixels)
    60: Vertical Blanking (in vertical pixels/lines)
    61: high significant bits for Vertical Active (4 upper bits)
        high significant bits for Vertical Blanking (4 lower bits)
    62: Horizontal Sync Offset (in pixels)
    63: Horizontal Sync Pulse Width (in pixels)
    64: Vertical Sync Offset (in lines) (4 upper bits)
        Vertical Sync Pulse Width (in lines) (4 lower bits)
    65: high significant bits for Horizontal Sync Offset (bit 7-6)
        high significant bits for Horizontal Sync Pulse Width (bit 5-4)
        high significant bits for Vertical Sync Offset (bit 3-2)
        high significant bits for Vertical Sync Pulse Width (bit 1-0)
    66: Horizontal Image Size (in mm)
    67: Vertical Image Size (in mm)
    68: high significant bits for Horizontal Image Size (4 upper bits)
        high significant bits for Vertical Image Size (4 lower bits)
    69: Horizontal Border
    70: Vertical Border
    71: Interlaced or not (bit 7)
        Stereo or not (bit 6-5) ("00" means not)
        Separate Sync or not (bit 4-3)
        Vertical Sync positive or not (bit 2)
        Horizontal Sync positive or not (bit 1)
        Stereo Mode (bit 0) (unused if 6-5 are 00)
  If Pixel Clock is null:
    56: 0
    57: Block type
      FFh=Monitor Serial Number, FEh=ASCII string, FDh=Monitor Range Limits, FCh=Monitor name, 
      FBh=Colour Point Data, FAh, Standard Timing Data, F9h=Currently undefined, F8h=defined by manufacturer
    58: Unknown
    59–71: Descriptor block contents.
      If block type is FFh, FEh, or FCh, the entire area is a text string.
      If block type is FDh:
        59–63:
          Min Vertical frequency, Max Vertical frequency, 
          Min Horizontal frequency (in kHz), Max Horizontal frequency (in kHz), pixel clock (in MHz (multiply by 10 for actual value))
        64–65: Secondary GTF toggle
          If encoded value is 000A, bytes 59-63 are used.  If encoded value is 0200, bytes 67–71 are used.
        66: Start horizontal frequency (in kHz).  Multiply by 2 for actual value.
        67: C. Divide by 2 for actual value.
        68-69: M (little endian).
        70: K
        71: J. Divide by 2 for actual value.
      If block type is FBh:
        59: W Index 0.  If set to 0, bytes 60-63 are not used.  If set to 1, 61–63 are assigned to white point index #1
        64: W Index 1.  If set to 0, bytes 65-68 are not used.  If set to 2, 65–68 are assigned to white point index #2
        White point index structure:
          First byte
            bit 3-2: low significant bits for White X (bit 3-2), White Y (bit 1-0)
          Second to third byte: high significant bits for White X, White Y.
          Fourth byte: Gamma.  Divide by 100, then add 1 for actual value.
          To decode White X and White Y, see bytes 25-34.
      If block type is FAh:
        59–70: Standard Timing Identification.  2 bytes for each record.
          For structure details, see bytes 38-53.

72–89: Descriptor Block 2
90–107: Descriptor Block 3
108–125: Descriptor Block 4
126: Extension EDID Block(s).  In EDID 1.1, it is ignored, and should be set to 0.
127: Checksum.

For example, here is a summary of the data reported by An Envision EN-775e monitor:

  Monitor Name                 EPI EnVision EN-775e
  Monitor ID                   EPID775
  Model                        EN-775e
  Manufacture Date             Week 26 / 2002
  Serial Number                1226764172
  Max. Visible Display Size    32 cm × 24 cm (15.7 in)
  Picture Aspect Ratio         4:3
  Horizontal Frequency         30–72 kHz
  Vertical Frequency           50–160 Hz
  Maximum Resolution           1280×1024
  Gamma                        2.20
  DPMS Mode Support            Active-Off

Supported Video Modes:
  640×480                    140 Hz
  800×600                    110 Hz
  1024×768                   85 Hz
  1152×864                   75 Hz
  1280×1024                  65 Hz

Monitor Manufacturer:
  Company Name                 Envision, Inc.

[Edit] external links

• Vesa bios extensions/display data channel Standard
• VESA enhanced extended display identification data-Implementation Guide
• Edid 1.2 on flat panels (in Appendix)
• Read-edid software for Linux and Windows
• PowerStrip for Windows (firmware ware)
• Softmccs for Windows (freeware). edid analysis tool
• Nirsoft-Windows freeware-dumpedid command line (GUI available)
• Phoenix edid Editor (freeware)
• Switchresx for Mac OS X shows edid and customizes display timings
• Displayconfigx for Mac OS X shows edid and customizes display timings