The non-easy slipped speed memory flash has the characteristics of high speed, low cost and large density.Flash memory mainly has nor flash and NAND flash two types, in general, nor type is more suitable for storing program code, NAND type can be used for large-capacity data storage.1, NOR type Flash memoryNOR Flash Technology was first developed by Intel Corporation in 1988, and its appearance revolutioniz
Currently, storage modules are indispensable in the development and design of various embedded systems. Nor and NAND are two major non-loss flash technologies on the market.
Nor-flash memory has a small capacity and a low write speed. However, due to its fast random reading speed, it is often used in the storage of program code in embedded systems. The internal structure of nor-flash memory determines that it is not suitable for large-capacity develo
The wiring of NAND Flash is different from that of nor flash and SDRAM. Taking the k9f1208 on the tq2440 Development Board as an example, the wiring method of NAND Flash is analyzed.
The k9f1208 structure is as follows:
K9f1208 bits are 8 bits in width.
Page 1: the last 16 bytes of 512 bytes and 16 bytes are used to store verification codes and other information. Actual data cannot be stored.
A block h
I. Pin Introduction
Pin name
Pin Function
CLE
Command lock function
Ale
Address lock function
/CE
Chip enabling
/Re
Read enabling
/We
Write enable
/WP
Write Protection
R/B
Ready/busy output signal
VCC
Power Supply
VSS
Location
N. C
Not connected
Io0 ~ Io7
Transmit data, commands, and addres
Because Bootloadrer, params, and the kernel, and file systems are all in NAND flash, zoning has to be unified planning. The NAND flash partition of the system relies on both the u-boot and the Linux kernel settings.
the NAND partition in the U-bootFile: include/configs/Development Board. H This is the Phy3250 parameter, PHY3250 uses 32MB
We have completed the nand read operation in Linux-general Linux technology-Linux programming and kernel information. The following is a detailed description. Finally, I used the real and virtual address conversion functions, read the written information correctly, and mounted the cramfs partition.
Finally, the read part of the nand driver was completed on the last night. Now we can start the file system f
1. Understanding of Types
Divided into nor (or non) nand (and non)
2. Interface understanding
Nor (or not) ---- separate addresses and Data Bus;
Nand (non-) ---- address and Data Bus Sharing.
Iii. read/write units:
Nor (or not )----Bytes;
Nand (and non-) ---- page.
Iv. Composition:
Nor (or not) ---- sector, byte;
1. Brief DescriptionThe debugging and flash burning functions of jlink are powerful, but it is difficult to perform flash operations on S3C2410 and S3C2440: You need to set SDRAM when burning or flash; otherwise, the speed is very slow; burning and writing NAND flash can only be achieved theoretically, but no one has implemented it directly.In this article, an indirect method is used to burn or write non-NAND
K9f1208
Secotr size = 512 byte, block_pre_sector = 32 sector, block size = 512*32 = 16 K, device = 4096 block = 64 m
K9f1g08
Secotr size = 2 K, block_pre_sector = 64 sector, block size = 2*64 = 128 K, device = 1024 block = 128 m
The above is my previous understanding of the nandflash structure, which ignores a very important part, that is, the area where NAND is used to save other information. This information includes the block quality mark, the Logi
NAND Flash (k9f5608) Driver Programming
1. NAND Flash pins
The important ones of NAND Flash are as follows:
I/O pin: For this flash chip I/O pin, there are 8 0-7, and some chips have 16 0-15
CLE: instruction transmission enabling (the instruction can be locked in the instruction register of nand flash)
Ale: Address Tra
does not directly mount the system bus, but uses the nandflash controller (which is generally integrated into the CPU) to complete read and write operations. If we call the norflash addressing method direct addressing (instead of the direct addressing method in the Assembly, this means that the CPU can directly access the storage unit through the address line ), the nandflash here is indirect addressing (nandflash controller is needed here ). So we are using NandBefore flash, you must initializ
1. Brief DescriptionThe debugging and Flash burning functions of JLink are powerful, but it is difficult to perform Flash operations on S3C2410 and S3C2440: You need to set SDRAM when burning or Flash; otherwise, the speed is very slow; burning and writing Nand Flash can only be achieved theoretically, but no one has implemented it directly.In this article, an indirect method is used to burn or write non-Nand
During kernel transplantation today, we are going to add the NAND Flash Driver to achieve MTD partitioning. When we think of a sentence we saw in a book, we say there is no gap between each partition during partitioning, the ending address of the previous area is the starting address of the next area. However, when I look at my Development Board tutorial, the partition is as follows:
Static struct mtd_partition smdk_default_nand_part [] = {
[0] = {
.
A friend's problem can be solved after analysis. In fact, I have encountered the same problem before. It takes a long time and I have not summarized it.
Incident: Linux kernel 2.6.14 is used on NAND Flash, and the Samsung 2440 board is used to continuously write files and delete the files to a certain size limit. The number of idle Files written to flash is not more than 10%, it should be said that there are still many differences.
Step 1: syslog wr
Why are there two ways to start?This is determined by the different characteristics of two types of flash.NAND flash capacity is large, the cost of storing the unit bit data is much lower, but to read and write to NAND flash according to the specific timing, so the CPU can not directly address the NAND flash data, CPU to NAND flash data read and write through the
Under skyeye modify uboot support 2410 boot from nand my 2440 development board does not norflash, is from nand boot, but yangchuang does not provide the source code of the U-BOOT, so decided to transplant, but there is no good debugging method. It has not been completed yet. I recently saw that skyeye supports n... under skyeye modify uboot support 2410 boot from nand
For example, Samsung k9f1208u0b has a data storage capacity of 64 MB and uses block-page storage management. 8 I/OThe pin acts as a multiplexing port for data, addresses, and commands.
Chip storage layout and features:A piece of NAND Flash is a device whose data storage layers are:1 (device) = 4096 (blocks)1 (Block )-= 32 (pages/rows) pages and rows have the same meaning and are called differently.1 (page) = 528 (bytes) = data block size (512 bytes) +
[Switch] xip-execute in place, which is often translated into Chinese and executed in local mode. Indicates that the code can be executed in the current memory.
About nor flash xip:
Nand and nor and xip
"Nor features in-chip execution (xip, execute in place), so that applications can run directly in flash memory without having to read the code into system Ram. Nor transmission efficiency is very high, in 1 ~ The small size of 4 MB has high cost effici
Through the above section, for NAND flash, each page, corresponding to an idle area (OOB), this region is based on the hardware characteristics of NAND flash, the data is error-prone when reading and writing, in order to ensure the correctness of the data, it produced such a detection and error correction area, used to place the data checksum. OOB Read and write operations, generally with the operation of t
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