---assembly instruction in arm

A. With dots (usually arm GNU pseudo assembler instructions)
1. ". Text", ". Data", ". BSS"In turn, the following is code snippet, the following is the initialization data segment, and the following is uninitialized data segment. 2. ". Global"Defines a global symbol, which is usually used for LD. Like you see so often.

. Global _start 3. ". ASCII ",". Byte, ". Short", ". Int", ". Long", ". Word", ". Quad" define a string, and allocate space for it to define a byte, allocate space for it, take up a single byte, 0x34 define a short integer, and allocate space for it, as a double byte, 0x1234 defines an integral type, allocates space for it, occupies four bytes, 0x12345678 defines a long integer, allocates space for it, occupies four bytes, 0x12345678 defines a word, assigns space to it, defines one, and assigns definitions to it, Account for eight bytes, ... Like what
. Long 0x22011110//bwscon
. Long 0x00000700//bankcon0
...

4. "Abort" to stop compiling 5. ". Align "

. Align Absexpr1,absexpr2

Fills a value in an unused storage area in some sort of alignment. The first value represents the alignment, 4, 8,16, or 32. The second expression value represents the value 6 of the fill . If. else. endif "

. If

. Else

. ENDIF: Support Conditional precompilation 7. ". Include"

. Include "File": contains the specified header file, which you can place in the header file 8. ". Comm "

. comm symbol, Length:

Apply for a namespace in the BSS section, which is named symbol and length. The LD Connector will allow space for it to be 9 in the connection . " Equ

Equ symbol, expression: defines a symbol (symbol) as a value (expression). The instruction does not allocate space, equivalent to the #define in C language. For example

. equ aaa,0x20000000 10. ". Macro. Endm "

. Macro: Define a macro code,. Macro represents the beginning of the code,. ENDM represents the end of the code,. Exitm step out of the macro, examples are as follows:

. Macro Shiftleft A, b.if \b < 0

mov \a, \a, ASR #-\b

. Exitm

. endif

mov \a, \a, LSL #\b

. ENDM ". Req"

name. Req Register name: Defines an alias 12 for a register. Code "

. code [16|32]: Specifies the length that the instruction code produces, 16 indicates the thumb instruction, and 32 represents the arm instruction 13. ". Ltorg "

ltorg: Indicates that the current downward definition is attributed to the current paragraph and allocates space for it.

two. 1._start with slide line

The default entry for the assembler, but you can change it, want to change other flags, and use entry to specify other entry flags in the corresponding link script. Labels can be considered directly as addresses.
three. 1.mov--data transfer instruction without dot

Its delivery instructions can only be assigned a register value (to be able to express the number) to another register, or a constant to the register, the amount of the back to the amount of the front, such as

mov r1,r2

mov r1, #4096

The immediate number is less than 0xff (65535), if greater than 65535, then the LDR instruction is assigned a 2.b, bl--relative jump instruction

b just jump, and bl in addition to jump will return the address (BL's next instruction address) saved to LR registers. Where the jump range is the current instruction before and after 32M. 3.ldr, str--memory access instruction

The ldr instruction may be a large range of address read pseudo instructions, or a memory access instruction, when its second parameter has "=" before it represents a pseudo instruction, otherwise it is a memory access instruction, such as

Ldr R0, =0x53000000//r0=0x53000000

STR R1, [R2, #4]//Save R1 data to a memory cell with address r2+4

STR R1, [R2]///Save R1 data to a memory cell with address R2

str R1, [R2], #4//Save the R1 data to a memory cell with an address of R2, and then r2=r2+4

LDR R1, [R2, #4]//Read the memory unit data of address r2+4 into the R1

LDR R1, [R2]//Read memory cell data with address R2 to R1

LDR R1, [R2], #4//Read the memory unit data of address R2 to R1, and then R2=r2+4

The following categories are used as the change-site methods:

When Ldr reads pseudo instructions as a large range address, the LDR pseudo instruction is used to load the immediate number of 32 or an address value to the specified register. When compiling the source program, the LDR pseudo instruction is replaced by the compiler with a suitable instruction. If the loaded constant does not exceed the range of MOV or MVN, just use the MOV or MVN instructions instead of the LDR pseudo instruction, the assembler will put the constants into the word pool, and use a program relative offset LDR instructions to read the constants from the text pool.

3 Ways to address a register as a register's indirection
4.adr--A small range of address reads (only two parameters)

The ADR instruction reads the address value based on the relative offset of the PC to the register, and the ADR pseudo instruction is replaced by the compiler as a proper instruction when compiling the source program. Usually, the compiler uses an add instruction or sub instruction to realize the function of the ADR pseudo instruction, if it cannot be implemented with a single instruction, just produce an error, the compilation fails. Like what

ADR R0, delay//assigns the address of the label delay to R0

5.ldmia--Multi-Register addressingA single instruction can complete the transfer of multiple register values, and can complete up to 16 universal register values. Like what

ldmia R0, [R1, R2, R3, R4]

; R1 <-[R0]

; R2 <-[r0+4]

; R3 <-[r0+4*2]

; R4 <-[r0+4*3] 6.nop--NULL operation instructions do nothing and can be used as a delay. The 7.add,sub--addition and subtraction instruction is a total of three parameters, the following two parameters are manipulated and assigned to the first parameter, such as

add R1, R1, R0//r1=r1+r0

Sub R1, R1, R2//r1=r1-r2

The result of these two sentences is R1=R1+R0-R2
8.asr,lsl,lsr,ror,rrx,type rs

The basic format for ARM directives is as follows:

For Operand2 parameters, the code can be highly efficient if used flexibly.

Bucket Type One register operation

9.cmp--comparison instruction CSPR
A total of 16 conditional codes, each of which can be represented in 2 characters, can be added behind the instruction Mnemonics and used concurrently with the instruction. The highest 4-bit representation of the criteria field is the following table

Conditional code	Mnemonic suffix	Sign	Meaning
0000	EQ	Z-Placement	Equal
0001	NE	Z Clear Zero	Not equal
0010	Cs	C position	Unsigned number is greater than or equal to
0011	Cc	C Clear Zero	Unsigned number is less than
0100	MI	N Reset Position	Negative
0101	Pl	N Clear Zero	Positive or 0
0110	Vs	V-Placement	Overflow
0111	Vc	V Clear Zero	Not overflow
1000	Hi	C Set bit z clear Zero	Unsigned number is greater than
1001	Ls	C-Ching 0 z Placement	Unsigned number less than or equal to
1010	GE	N equals v	With a signed number greater than or equal to
1011	LT	n is not equal to V	With symbol number less than
1100	GT	Z-Clear 0 and (n equals v)	With a signed number greater than
1101	LE	Z-position or (n is not equal to V)	With a signed number less than or equal to