20145225 "Information Security system Design Fundamentals" 6th Week Study Summary

Fourth. Processor Architecture section Y86 instruction set architecture One, programmer visible State two, Y86 instruction

1.MOVL instruction

(1) Number of source operations

(2) Purpose of operation

2. Four integer operation instructions

3. Seven Jump Commands--branch control

4. Six Conditional delivery Instructions

5.call and RET

The call instruction returns the address to the stack, and then jumps to the destination address, which is returned from such a procedure invocation.

6.PUSHL and POPL

Implement in-stack and out-stack

7.halt instruction

The halt instruction stops the execution of the instruction, which causes the processor to stop and the status code to be set to HLT.

The byte-level code of the instruction four, Y86 exception 1. Possible value of status code stat

Stat describes the overall state of the program execution

1. AOK 正常操作2. HLT 处理器执行halt指令3. ADR 遇到非法地址4. INS 遇到非法指令

2. When an exception occurs?

The y86--processor stops running instructions.

V. The difference between Y86 procedure 1.y86 and IA32

1.Y86有时需要两条指令来完成IA32一条指令就能完成的事2.Y86没有伸缩寻址模式

2. Note Some of the following:

(1) The command indicates where the code or data should be placed, and how it should be aligned

(2) to "." The beginning is the assembler command

(3) The only tool for creating Y86 code is the assembler, so programmers must perform tasks that would normally be done to compilers, linker, and runtime systems.

PUSHL There is ambiguity between the different x86 models, but POPL does not.

Section II Logic Design and hardware control Language HCL One, Logic Gate II, Combinational circuits and HCl Boolean expressions

1. Limitations when building compute blocks (combinational circuits)

2. The difference between logical expressions in combinational logic circuits and C language

Three, word-level combination circuit and HCL integer expression four, set relationship

The general format for judging set relationships is:

in {iexpr1,iexpr2,...,iexprk}

IEXPR, etc. are all integer expressions.

The sequential implementation of the third section Y86

SEQ Processor

First, the process of organizing into phase (i) six basic stages:

• Take a finger
• Decoding
• Perform
• Visit
• Write back
• Update pc

(ii) The specific framework is divided into four categories:

• 1. For OPL (integer and logical Operations), RRMOVL (register-register transfer) and IRMOVL (immediate count-register transfer)

  2. For RMMOVL and MRMOVL

  3. For PUSHL and POPL

  4. For jump, call and RET

The summary is that the clock is used to control the updating of the state elements, and the values are propagated by the combinatorial logic.

Experiment

After you run the make command

To view the contents of the directory, you can see only. ys files

After compiling with the make all command

After compiling and viewing the contents of the directory, you can see that there are already compiled. yo files that can be viewed with vim

20145225 "Information Security system Design Fundamentals" 6th Week Study summary