Summary of learning contents of textbook the memory system is a hierarchical random access memory (class two) with different capacity, cost and access times for storage devices 1. Static RAM
SRAM features: The memory unit has bistable characteristics, as long as the power will always maintain its value, interference elimination, the circuit will be restored to a stable value
2. Dynamic RAM
DRAM features: Each bit of storage is charged to a capacitor, when the voltage of the capacitor is disturbed, it will never recover the DRAM storage instability response mechanism: ① memory system must be periodically read out, or rewrite to refresh every bit of memory ② use error correction code
The difference between SRAM and DRAM:
① as long as there is power, SRAM will remain the same, while the DRAM need to constantly refresh ②sram of access than DRAM fast ③sram light and electrical noise and other interference insensitive ④sram than the DRAM need to use more transistors, so more expensive
The traditional DRAM:
Line address I:ras column address J:cas
DRAM is organized into two-bit arrays to reduce the number of address pins on the chip, but increases the access time DRAM chip packaging is inserted into the memory module on the expansion slot of the motherboard Memory module classification:
① 168-pin dual-inline memory module with 64-bit data ② 72-pin single-row inline memory module to transmit data disk storage in 32-bit blocks
Disk Construction: composed of platters
Surface: Each platter has two surface spindles: Central disc, rotatable Track: Concentric circular sector: each track is divided into a set of sector data bits: each sector contains an equal number of data bits, typically 512-byte gaps: stores the format bits used to identify sectors Cylinder: The set of tracks equal to the center of the spindle on all disc surfaces
Calculation formula:
Disk capacity = Bytes/sector x average number of disks/track x number of tracks/surface x surface number/disc x number of discs/disk
1gb=10^9 bytes
Disk operations:
Read-write head: Disk read-write header to read and write bits stored on magnetic surfaces
Seek: The drive can position the read-write head on any track on the disc at any time by moving the drive arm along the radius axis, and all the read and write heads are on the same cylinder
Read and write head collision: Read and write head hit the block, read and write the head will stop
Disk reads and writes data in sector-sized chunks: Seek time:
The time required to move the carrier arm
Rotation time:
Once the read-write header is positioned to the desired track, the drive waits for the first bit of the target sector to rotate to the read-write header under Tmax rotation=1/rpm x 60secs/1min tavg Rotation=0.5tmax rotation
Delivery time:
The transfer time of a sector depends on the rotational speed and the number of sectors per track Tavg transfer= 1/rpm x 1/(Average sectors/tracks) x 60s/1min
Access time =tavg Rotation+tavg Transfer+tavg seek
Logical Disk Block
Disk controller: A small hardware, firmware device on a disk that maintains a mapping between logical block numbers and actual physical disk sectors
To connect to an I/O device:
Peripheral Interconnect (PCI): Categories connected to the CPU and main memory I/O bus: Universal Serial Bus (USB): Includes keyboard, mouse, modem, digital camera, game joystick, printer, external disk drive, SSD and other graphics cards (adapters): Responsible for drawing pixels on the monitor on behalf of the CPU Host Bus Adapter: A communication protocol defined using a special host bus interface
Solid-state drives (SSDs):
A SSD package consists of one or more flash chips and a flash translation layer the performance difference between random read and write is determined by underlying flash basic properties
Reasons for slow reading and writing:
① Erase block takes a relatively long time ② write attempts to modify a page containing the data already in it, then all pages with data in this two block must be copied to a new (erased) block before the page P is written
Advantage: The random access time is lower than the rotating disk block, and consumes less energy and is more robust. Cons: The average wear logic in the Flash translation layer attempts to maximize the life of each block by distributing the erase evenly across all the blocks
Locality of
The tendency to refer to data items that are adjacent to other recently referenced data items, or to the recently referenced data items themselves, is called the principle of locality.
Time locality: A memory location that has been referenced once is likely to be referenced more than once in the near future: A memory location is referenced once, and the program is likely to refer to a nearby memory location in the not-too-distant future
The simple principle of evaluating locality in a program:
① a program that repeatedly references the same variable has good time locality ② for a program with a reference pattern with a step size of K, the smaller the step size, the better the spatial locality ③ for taking the instruction, the loop has a good time and spatial locality, the smaller the loop body, the more the loop iteration number, the better the locality.
Caching in the memory hierarchy
Cache: is a small and fast storage device that acts as a buffer zone for data objects stored in larger, slower devices cash cache: The process of using caching cashing blocks: The k+1 layer of memory is divided into successive objects, each with a unique address or name, Differentiate it from other block transfer units: Data is always in block size as a transfer unit
Cache Hits:
When a program needs a data object D in the k+1 layer, it first looks for D in a block that is currently stored in the K layer, and if D is just cached in level K, then we say cache hit.
Cache misses:
If there is no cache data Object D in Layer K, then that is what we call cache misses
To replace or expel:
The process of covering an existing block
Sacrifice Block:
The piece that was expelled.
Replacement policy:
Decide which block should be replaced
Types of Cache Misses:
Cold cache (Force Miss \ Cold not hit): An empty cache, for the case of a valid bit of 0 placement policy: A miss, the K-tier cache must execute a placement policy to determine where to put it from the k+1 layer of the block where the conflict is not hit: a restrictive placement policy will cause a miss Working set: A program is run in a series of stages, and each stage accesses a relatively stable collection capacity of the cache block without hitting: when the working set size exceeds the cache's large hour
Cache management: Something that divides the cache into chunks, transfers blocks between different tiers, determines whether they are hit or miss, and processes them
Cache memory
General-Purpose Cache Memory Architecture:
Each memory address has a M-bit, which forms m=2^m different address cache groups: Array cache lines for S=2^s cache groups: b=2^b bytes of data blocks make up a valid bit: Indicates whether the row contains meaningful information marker bits: Uniquely identifies the block stored in this cache line, T=m-( B+s)
20145339 "Information Security system Design Fundamentals" 7th Week Study Summary