A new generation of technologies in gigabit switches

As compatible with the latest Ethernet technology, Gigabit Ethernet is not only Ethernet "high-speed pirated", Gigabit Ethernet for the first time to put forward the million Gigabit wide area Ethernet technology, the first time to achieve a private network to the public network integration. Similarly, as the core device of the network, the Gigabit Ethernet switch is also not only supporting Gigabit access modules on existing Gigabit Ethernet switches, it requires a new generation of system design, including from the switch architecture, two/three layer technology updates, to the next generation IPV6 default support and effective bandwidth management. This article will explore these new generations of technology.

In recent years, from the LAN to the metropolitan area Network, from the metropolitan area network to the WAN, the Ethernet technology is occupying the more and more market with the astonishing speed, especially in the enterprise network and the operator network, the Ethernet technology becomes the undisputed choice more and more. From Fast Ethernet to Gigabit Ethernet to Gigabit Ethernet, the technical updates meet the demands of a new generation of Internet technologies for high-speed bandwidth growth and a new generation of applications.

Let's take a look at the next generation of technology in the Gigabit Ethernet switch.

A distributed Exchange system

Users invest in Gigabit Ethernet switches because they need to be able to process packet forwarding in any case, need to be able to handle a new generation of Internet applications, such as multicast applications, streaming media applications, IP voice, next-generation Internet IPv6 applications, and also the need for switches to provide the best investment protection, Can occupy the least rack space, can save as much electricity as possible, can see the user's traffic, and so on.

Obviously, the gigabit switch can not accommodate the Wan port of the wire-speed forwarding, the current gigabit switch can only provide dozens of to hundreds of G throughput, and the next generation of million-gigabit switch can provide processing 1000 g/S throughput. Because such a large data throughput with the highest CPU can not achieve wire speed forwarding, so we need a dedicated network integrated circuit chip (ASIC), while the task of data forwarding needs to be distributed to each module to achieve.

Distributed systems have different implementations, one is to transfer the common tasks to the local module on the traditional switch technology, it can take advantage of the local exchange matrix, but also can use the Exchange matrix of the whole switch, but it is obviously not the best Another approach is to completely distribute all data-forwarding tasks to each module and implement it using the local bulk-Exchange matrix.

Therefore, large-capacity distributed switching structure is the most effective, the million-gigabit switch should not only provide large-capacity backplane exchange matrix, but also provide large capacity of the local exchange matrix, non-blocking parallel Exchange matrix is currently the most advanced technology.

ASIC and FPGA chip

At the same time, the ASIC provides the use of a dedicated chip instead of a CPU when forwarding data. The ASIC's measure is to handle all traffic forwarding at the chip level as much as possible, but the problem is that the switch cannot be modified once the ASIC is designed. So we will choose to handle as many data forwarding design products, we will consider the IPV4 packet switching and routing, IP multicast packets, whether to achieve chip-level data streaming and quality of service assurance (QoS), whether to achieve chip-level data speed limit, Whether the data speed limit can be implemented in a variety of ways and using the credit system rather than the ticket system, whether it can implement policy routing, whether Access list control (ACL) can be achieved, whether the next generation of IPV6 exchange and routing, or even chip-level collection of data flow and other issues. Excellent ASIC design embodies the highest technology of switch design.

However, with the distributed Exchange System and excellent ASIC technology is not enough, because the ASIC technology once the implementation can not be changed, then the new technical standards, new application model will be fully utilized by the CPU to deal with, and this often gives users the loss of performance and business pain. The solution could be to buy a new generation of ASIC-designed modules, but hardware upgrades could result in expensive additional investments. The latest million-gigabit switch will use the Field Programmable Gate array chip (FPGA) to solve this flaw, the new standards through software upgrades by hardware processing, providing the best protection of user investment.

Resolve Conflicts

As a result, it seems that all the problems have been solved. Since each module of the switch and between them and the central management module is an organic whole, the distribution and maintenance of Internet routing information requires the participation of various modules, and there is always the problem: because the local hardware chip is not addressable and requires the participation of the central management module, So the performance of the switch will be lost.

How does the latest mega-switch solve this problem? Mainly through two channels: first, the control channel and data forwarding channel separation, the second is in each interface module with High-performance CPU participation. The separation of control channel and data forwarding channel is to realize two different parallel cross matrices on the switch. In this way, the backplane capacity will be fully used in the data channel, but also guarantee the security of the million-gigabit switch hardware, and the local high-performance CPU participation so that the central management module will never deal with the data involved in each interface forwarding, to achieve a true sense of the distributed architecture.

Of course, there are many factors involved in the architecture of Gigabit Ethernet, such as large-capacity SDRAM and TCAM (capable of more than 1 billion searches in one second), such as whether local routing is based on topology-driven.

More importantly, the million-gigabit switch software is multithreaded, whether the software provides the latest generation of two/three layer of technical standards. These two/Three tier technologies contain the latest requirements for a new generation of networks, such as link bundling based on Gigabit Ethernet ports, the availability of various technologies for fast link redundancy, whether to provide security technology from port security to various user authentication, and the availability of complete IPv4 and IPV6 specifications, Whether to provide fast BGP routing technology, whether to provide redundant routing protocols, whether to provide two-three-tier security features, whether to provide protection against attack characteristics of the switch, whether to provide the switch itself CPU intelligent protection, whether all of these features are hardware implementation.