A little discovery of Stm32 's window watchdog

Today look at Stm32 window watchdog, suddenly found very abnormal, so did all aspects of the experiment came to the following conclusions, because only the conclusion of the experiment has no official conclusion, so if someone has a theoretical basis please tell me, thank you very much 1
1. Once the Windows watchdog clock is enabled, the EWIF bit of the SR register will be set to 1
2. Once the defined window range is fed, the dog will be reset.
3. In the absence of the Enable window watchdog timer (i.e., the WDGA register of the CR register to enable the watchdog), the SR cannot be cleared by the software 0
Conclusion: Therefore, the window watchdog must be cleared 0 so that the interrupt can be placed in the last 2 sentences of initialization in order to run normally.