CPSR & spsr
A short line of learning notes triggered by compilation ~
The ARM microprocessor Supports Program Status Register Access commands for transferring data between program status registers and General registers. The access commands of the Program Status Register (* PSR) include the following two:
Certificate --------------------------------------------------------------------------------------------------------------------------------------------------
About the Mrs command:
1. When you need to change the content of the Program Status Register, you can use Mrs to read the content of the Program Status Register into the General Register, and then write it back to the Program Status Register after modification.
2. During exception handling or process switching, you need to save the value of the Program Status Register. You can use this command to read the value of the Program Status Register and then save it.
Mrs r0, spsr; // transfer the value of spsr to the R0 register.
Certificate ---------------------------------------------------------------------------------------------------------------------------------------------
MSR command:
The MSR command is used to transmit the content of the operand to a specific domain of the Program Status Register. The operands can be General registers or immediate numbers. Field is used to set the bit to be operated in the Program Status Register.
As you can see, the 32bits of the dsrs can be divided into four domains. F S x C
MSR cpsr_c, R0; // transfers R0 to spsr, but only modifies the control domain in CPSR
Certificate -----------------------------------------------------------------------------------------------------------------------------------------
CPSR: Current Program Status Register
Hey hey ~ The seven operating modes of arm are specified by the M [0: 4] five digits of the CPSR register.
Spsr: saved Program Status Register
Spsr is used for exception handling and has the following functions:
1. Save the current operation information in Alu.
2. Allow and prohibit interruptions.
3. Set the running mode of the processor.
Access Notes for CPSR & spsr program status registers