Adding SPI Resources on the Freescale Mx6q platform

1: Configure PIN for SPI function

At the end of the board-mx6q_sabresd.h, the copy is redefined

(To add SPI2 as an example)

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1. <span style="FONT-SIZE:18PX;" > MX6Q_PAD_EIM_CS0__ECSPI2_SCLK,
2. Mx6q_pad_eim_cs1__ecspi2_mosi,
3. Mx6q_pad_eim_oe__ecspi2_miso,
4. MX6Q_PAD_CSI0_DAT11__ECSPI2_SS0,
5. </span>

After that, the board-level file BOARD-MX6Q_SABRESD.C will have related functions for the unified initialization of the PIN.

Complete the operation of the Register configuration.

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1. <span style="FONT-SIZE:18PX;" > mxc_iomux_v3_setup_multiple_pads (mx6q_sabresd_pads,
2. Array_size (mx6q_sabresd_pads));
4. Mxc_iomux_v3_setup_multiple_pads (mx6q_sabresd_cstm_tq_pads,\
5. Array_size (mx6q_sabresd_cstm_tq_pads));</span>

2: Add the following code in the board-level file BOARD-MX6Q_SABRESD.C

Will match the driver source in the Driver/spi/spidev.c file

2.1 Completing the SPI Master Registration

SPI2 Blade pin-Select macro definition:

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1. <span style="FONT-SIZE:14PX;" > #define SABRESD_ECSPI2_CS0 IMX_GPIO_NR (5) </span>

Adding related structures

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1. <span style="FONT-SIZE:14PX;" >static int mx6q_marsboard_spi1_cs[] = {
2. Sabresd_ecspi2_cs0,
3. };
4. </span>

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1. <span style="FONT-SIZE:14PX;" >static const struct Spi_imx_master mx6q_sabresd_spi2_data __initconst = {
2. . Chipselect = Mx6q_marsboard_spi2_cs,
3. . Num_chipselect = Array_size (Mx6q_marsboard_spi1_cs),
4. };
5. </span>

2.2 Matching SPI2 driver files on the SPI bus

The MX6Q platform has 2 SPI resources and 0/1, of which the Bus_num is the bus selection of the mounted drive.

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2. <span style="FONT-SIZE:18PX;" ><span style="FONT-SIZE:14PX;" >static struct mtd_partition imx6_sabrelite_spi_nor_partitions[] = {
4. {
6. . Name = "Bootloader",
8. . Offset = 0,
10. . Size = 0x00100000,
12. },
14. {
16. . Name = "Kernel",
18. . offset = Mtdpart_ofs_append,
20. . Size = Mtdpart_siz_full,
22. },
24. };
30. Static struct Flash_platform_data imx6_sabrelite__spi_flash_data = {
32. . Name = "Spidev",//matching principle.
34. . Parts = Imx6_sabrelite_spi_nor_partitions,
36. . Nr_parts = Array_size (imx6_sabrelite_spi_nor_partitions),
38. . Type = "sst25vf016b",
40. };
50. Static struct Spi_board_info imx6_sabrelite_spi_nor_device[] __initdata = {
52. {
54. . Modalias = "Spidev",
56. . max_speed_hz = 20000000, /* max SPI Clock (SCK) speed in Hz */
58. . Bus_num = 1, //device Mount number on the SPI bus
60. . Chip_select = 0,
62. . Platform_data = &imx6_sabrelite__spi_flash_data,
64. },
66. };
72. Spi_register_board_info (Imx6_sabrelite_spi_nor_device,
74. Array_size (Imx6_sabrelite_spi_nor_device));
78. Imx6q_add_ecspi (0, &mx6q_sabrelite_spi2_data);
92. </span>
94. </span>

3: Kernel configuration

View Kconfig in the spidev.c file directory and makefile Learn how to add kernel drivers

Select the Blue section option to add the spidev.c file to the kernel.

4: View the Development Board/sys/bus/spi/drivers/spidev directory

Generating device files in/dev/dev/spidev1.0

5: Test the interface using the SPI test program in the Freescale official BSP Package

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2. <span style="FONT-SIZE:12PX;" >/*
4. * SPI Testing utility (using Spidev driver)
6. *
8. * Copyright (c) MontaVista Software, Inc.
10. * Copyright (c) Anton Vorontsov <[email protected]>
12. *
14. * This program was free software; You can redistribute it and/or modify
16. * It under the terms of the GNU general public License as published by
18. * The free software Foundation; Either version 2 of the License.
20. *
22. * Cross-compile with Cross-gcc-i/path/to/cross-kernel/include
24. */
28. #include <stdint.h>
30. #include <unistd.h>
32. #include <stdio.h>
34. #include <stdlib.h>
36. #include <getopt.h>
38. #include <fcntl.h>
40. #include <sys/ioctl.h>
42. #include <linux/types.h>
44. #include <linux/spi/spidev.h>
48. #define ARRAY_SIZE (a) (sizeof (a)/sizeof ((a) [0]))
52. static void Pabort (const char *s)
54. {
56. Perror (s);
58. Abort ();
60. }
64. Static Const Char *device = "/dev/spidev1.0";
66. static uint8_t mode;
68. static uint8_t bits = 8;
70. static uint32_t speed = 500000;
72. static uint16_t delay;
76. static void transfer (int fd)
78. {
80. int ret;
82. uint8_t tx[] = {
84. 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
86. 0x40, 0x00, 0x00, 0x00, 0x00, 0x95,
88. 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
90. 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
92. 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
94. 0xDE, 0xAD, 0xBE, 0xEF, 0xBA, 0xAD,
96. 0xF0, 0x0D,
98. };
100. uint8_t Rx[array_size (tx)] = {0,};
102. struct Spi_ioc_transfer tr = {
104. . Tx_buf = (unsigned long) TX,
106. . Rx_buf = (unsigned long) Rx,
108. . Len = Array_size (TX),
110. . Delay_usecs = delay,
112. . Speed_hz = Speed,
114. . Bits_per_word = Bits,
116. };
120. RET = IOCTL (FD, Spi_ioc_message (1), &TR);
122. if (Ret < 1)
124. Pabort ("can ' t send SPI message");
128. For (ret = 0; ret < array_size (TX); ret++) {
130. if (! ( Ret% 6))
132. Puts ("");
134. printf ("%.2x", Rx[ret]);
136. }
138. Puts ("");
140. }
146. int main (int argc, char *argv[])
148. {
150. int ret = 0;
152. int fd;
156. //parse_opts (argc, argv);/* For what, unknow*/
160. FD = open (device, O_RDWR);
162. if (FD < 0)
164. Pabort ("can ' t open device");
168. /* 
170. * SPI mode
172. */
174. RET = IOCTL (FD, Spi_ioc_wr_mode, &mode);
176. if (ret = =-1)
178. Pabort ("can ' t set SPI mode");
182. RET = IOCTL (FD, Spi_ioc_rd_mode, &mode);
184. if (ret = =-1)
186. Pabort ("can ' t get SPI mode");
190. /* 
192. * Bits per Word
194. */
196. RET = IOCTL (FD, Spi_ioc_wr_bits_per_word, &bits);
198. if (ret = =-1)
200. Pabort ("can ' t set bits per word");
204. RET = IOCTL (FD, Spi_ioc_rd_bits_per_word, &bits);
206. if (ret = =-1)
208. Pabort ("can ' t get bits per word");
212. /* 
214. * Max speed Hz
216. */
218. RET = IOCTL (FD, Spi_ioc_wr_max_speed_hz, &speed);
220. if (ret = =-1)
222. Pabort ("can ' t set max speed Hz");
226. RET = IOCTL (FD, Spi_ioc_rd_max_speed_hz, &speed);
228. if (ret = =-1)
230. Pabort ("can ' t get max speed Hz");
234. printf ("SPI mode:%d\n", mode);
236. printf ("bits per word:%d\n", bits);
238. printf ("Max speed:%d Hz (%d KHz) \ n", speed, speed/1000);
242. Transfer (FD);
246. Close (FD);
250. return ret;
252. }
254. </span>

Execution of the application, you can see the timing mode (SPI 4 timing mode No. 0), clock frequency and other parameters.

Adding SPI Resources on the Freescale Mx6q platform