am335x Clock PLL configuration on the LCD screen

The main reference is the 8th chapter of Am335x's TRM PRCM module and the 13-chapter LCD Controller. Here in the LCD controller inside the configuration described in more detail, the frequency division and pixel, the setting of the extinction value and so on. Not to repeat, many people will complain that the LCD_PCLK configuration can only be LCD_CLK through a crossover, so for frequency 70~90mhz configuration is difficult. But in fact, our set of LCD_CLK is more flexible, refer to the following: 8.1.6.10 in section: Display PLL Description

The left part I will explain slowly, first look to the right. The LCD_CLK on the right is the final lcd_clk of the LCD module, which is connected to the following block diagram. But there is a place in the diagram below that is easy to confuse, is the yellow part of the place, the clock source selection is not unique, as shown in, LCD_CLK does not have to use the display PLL clkout, you can also use CORE_CLKOUTM5 or Per_ CLKOUTM2 as a clock. Chapter 13: LCD Controller parts:

The point is, on the Starterkit EVM board, based on the Starterware LCD display routine, is the use of PER_CLKOUTM2 as the clock source, the clock is 192MHz (actually PER_CLKOUTM2 clock is also flexible configuration, but not recommended, Because he is the clock is the core of clocks, if this change, the other peripherals also have to change, the impact is relatively large, so for the road clock to honestly use 192MHz, this description of TRM can refer to the TRM table 8-24. Per PLL Typical frequencies (MHz), so this gives a lot of people the intuitive impression that our lcd_clk can only be divided from 192MHz, in fact, there are more options. For example, using CORE_CLKOUTM5, this clock is 250MHz (similar to PER_CLKOUTM2, can also change the configuration but not recommended, refer to the TRM table 8-22. Core PLL Typical frequencies (MHz). In addition, a more flexible display PLL clkout can be used (later on in this section). So the choice of clock configuration is very flexible:). So how do you choose a different clock source? Very simply, in a CLKSEL_LCDC_PIXEL_CLK register with a CM_DPLL register (0x44e0_0500) offset of 34h, the 1-0-bit is the selection configuration for this clock. OK, do you think it's a wide choice? If you want a more flexible configuration, the rest is to see how you play the clock of the display PLL, which is referenced in the TRM 8.1.6.10 display PLL description, which includes how to configure it. The main configuration is a few registers in the Cm_wkup (0x44e0_0400), in the TRM 8.1.6.10.1 Configuring the Display PLL section, there is a very detailed description, each step is described clearly.

am335x Clock PLL configuration on the LCD screen