Analysis of niosii Lighting Program on de0

I have just started to learn about nioⅱ and de0, and I am going to record the details of the process. Please also give me some advice ~~~~~~

Lighting on de0 Program Analysis

CPU

SDRAM

Flash

The above are the components in the system. I have read the manual about the timing of SDRAM and flash, but they are not very clear. Please kindly advise de0 experts. Thank you, flash adopts the 8-Bit mode.

The pin allocation in quartuⅱ was just a day yesterday, and I understood the 8-Bit mode and 16-Bit mode of flash. I was always prompted that CFI could not be connected. After dividing the pins, this error is not displayed.

 

 

Then, we developed the software.

First, create a file (. h ).

 

// You can specify the value of the parameter.# Ifndef sopc_h _ # define sopc_h _ # include"System. h"# DEFINE _ ledtypedefStruct{UnsignedLong IntData; unsignedLong IntDirection; unsignedLong IntInrerrupt_mask; unsignedLong IntEdge_capture;} pio_str; # ifdef _ led # define led (pio_str *) led_base) # endif/* Sopc_h _*/
 

And Main. c files

/** "Hello World" example. ** this example prints 'Hello from NiO II' to the stdout stream. it runs on * the nio ii 'normal', 'full _ featured', 'fast ', and 'low _ cost' example * designs. it runs with or without the microc/OS-II RTOS and requires a stdout * device in your system's hardware. * The Memory footprint of this hosted application is ~ 69 Kbytes by default * using the standard reference design. ** for a reduced footprint version of this template, and an explanation of how * to reduce the memory footprint for a given application, see the * "small_hello_world" template. **/ # Include <stdio. h> # include <unistd. h> # include" ../INC/system. h " Int Main (){ Int I; While (1 ){ For (I = 0; I <4; I ++) {led-> DATA = 1 <I; usleep (500000 );}} Return 0 ;}

 

Next, the program is downloaded. The hardware is first written in Quartus, and then the software is downloaded in IDE as follows:

Invalid project path: missing project folder or file: \ Altera. Components \ bin for output path. Altera. Components (this is the prompt of problem under IDE)

 

The prompt in the console is:

Using Cable "USB-blaster [USB-0]", device 1, instance 0x00
Pausing target processor: OK
Reading System ID at address 0x00401018: verified
Initializing CPU cache (if present)
OK

Downloading 01000020 (0%)
Downloaded 28kb in 0.4 s (70.0kb/s)

Verifying 01000020 (0%)
Verify failed between address 0x1000020 and 0x1006d13
Leaving target processor paused

I'm surprised that I didn't use address 0x1000020 and 0x1006d13 in the system. I don't know where it came from. If anyone knows it, please let me know, O (distinct _ distinct) O ~

 

Check again the SDRAM (the configuration after the A3v64s40ETP-G6) is as follows:

However, it seems that the t_ac and t_wr are still not found.