Analysis of the Startup Process of the dm642.

The chip reads 1 kb of data from the CE1 space to the internal SRAM, and then runs from address 0. Generally, a program is much larger than 1 K bytes, so there is usually a second-level bootloader that is used to load the main program. After bootloader is run, c_int00 () is called to initialize the C runtime, such as the stack and static variables. Then, bios_init is called to run the main function, after the main function is completed, the task manager of DSP/BIOS starts to run.

It is a little complicated to implement, because there are some practical problems that need to be considered.
1. external memory is generally nor
Flash, the capacity is large, because the CE1 of DMPS only has 1 MB space, you need to use the paging mode of gpio. Because the default value of gpio is input and the internal has an upper-tension resistance, bootloader needs to be written on the top page. The slowest read/write time sequence is used after the DMPS are reset.
2. bootloader needs to complete the SDRAM initialization within a limited 1 kb, and the main program is moved to the memory before running. The Ti example is compiled by sink, because the runtime environment of C has not been initialized yet. The most important thing is that the stack pointer is not initialized. After we assign a value to it, the other part can be written in C, but note that the C library function cannot be used.

The Assembly part initializes the stack pointer:
_ Boot_sp:
Mvk. S2 0x0600, B15
Mvkl. S2 _ boot_loader, B0
Mvkh. S2 _ boot_loader, B0
B. S2 B0
NOP 5

Boot. c initialize EMIF and read the main program from flash into SDRAM in Segments
# Pragma code_section (boot_loader, ". boot_load ");

Void boot_loader (){
Uint32 program_addr, size;
Uint8 * SRC, * DEST;

Program_addr = 0x90000404; // first entry

// Init The EMIF Interface
Emifa_gctl = 0x00052060;
Emifa_ce0 = 0x00000040;
Emifa_ce1 = 0x21e28e01; // 0x11518a01
Emifa_ce2 = 0xffffffd3;
Emifa_e3 = 0xffffffd3;
Emifa_sdramctl = 0x6b228000;
Emifa_sdramtim = 0x000003a9;
Emifa_sdramext = 0x000505cd;
Emifa_ce0secctl = 0x00000071;
Emifa_ce1secctl = 0x00000002;
Emifa_ce2secctl = 0x00000002;
Emifa_ce3secctl = 0x00000002;

// Load second bootloader to SDRAM
Size = * (uint32 *) program_addr;
While (size ){
Program_addr + = 4;
DeST = (uint8 *) (* (uint32 *) program_addr );
Program_addr + = 4;
Src = (uint8 *) program_addr;
Program_addr + = size;
If (size % 4) program_addr + = 4-(size % 4 );
While (size --) {* DEST ++ = * SRC ++ ;}
Size = * (uint32 *) program_addr;
}

C_int00 (); // run the second bootloader
3. The common problem is that bootloader runs normally during debugging and cannot be started after being written to flash. The difference here is that the CCS is responsible for loading the program into the memory during debugging, and then the program runs directly from c_int00 (), and it is up to itself to install flash. The method for debugging this problem is to check whether the bootloader code is located at the address 0 of the memory after loading the CCS program. If the code is incorrect, the linker CMD file or the DSP/BIOS memory settings are incorrect, put the bootloader in the On-Chip SRAM. Then let the program run from the 0 address to check whether the main program is correctly loaded into the memory.
. Boot_load {
Boot_sp.obj
Boot. OBJ
}> Boot_ram
Boot_ram is an internal SRAM space with a starting address of 0 and a length of 1 kb.
4. After the bootloader is debugged, it is written to flash. First, use TI's hex6x to convert the output to a HEX file, and then use flashburn or your own code for writing. The first 1 kb of Flash is bootloader, followed by the main program code segment. For the code format, see boot. C.