ARM Architecture Summary

Special function registers are bound to peripherals, and universal registers are CPU bound.

ARM is a RISC architecture

Only twenty or thirty commonly used arm assembly instructions

ARM is a low-power CPU

The architecture of ARM is ideal for single-chip, embedded, especially in the internet of things, and the high performance areas such as servers are currently dominated by Intel

Most of the arms are 32-bit architectures, and there are now a handful of 64-bit, as early as 16-bit.

The 32-bit ARM CPU supports less than 4G of memory and is accessed through address bus.

The various internal peripherals in the SOC are accessed through their own SFR programming, which is accessed in a manner similar to accessing normal memory, which is called IO and memory-consistent addressing.

Common RAM (except ARM7) is a Harvard structure.

The stability and security of arm CPUs is ensured, so arm is suitable for embedded applications

The Harvard structure also determines the link between arm bare-metal programs (with physical addresses), and you must use complex link scripts to tell the linker how to organize the program; for applications above the OS (working in virtual addresses) there is no need to consider so much

ARM Architecture Summary