Arm simulation debugging technology

Source: Internet
Author: User

Author: Yang Shuo,Hua Qing vision embedded college lecturer.

In the design of embedded systems, the scope of Simulation Applications is mainly focused on program simulation. In the development process of arm, the simplest and original development process is to write a program and then download it to the chip for verification, this method can be used for a simple small system, but it is completely impossible to use this method in a large system. So many times we need to debug the program without burning the Code. This is the simulation debugging technology.

Modern debugging technology can be divided into software simulation debugging and hardware simulation debugging:

I. Software Simulation (Instruction Set simulation ):

Concept:

Use a Data Structure to describe various registers and other resources (memory, etc.) in the CPU of the target machine. Through software simulation, you can explain and execute programs in the executable image of the target machine one by one.

Application scenarios:

● When embedded software development is performed without the target hardware platform, it is necessary to use this software to simulate the target CPU to verify the code logic.
● It is an effective tool for learning embedded development. It frees learners from the underlying hardware details and focuses on software, especially System Software unrelated to specific hardware (TCP/IP protocol stack ).

Several good hardware simulation platforms:

● Skyeye: Chen yufa, a postdoctoral fellow in the computer department of Tsinghua University, is an open-source project that mainly simulates the ARM Kernel CPU.
● Armulator: arm Instruction Set Simulator (this is used on ads and realview MDK ).
● Zix: a fast, efficient, and easy-to-configure embedded Linux development environment.

Disadvantages of Software Simulation:

Hardware-related components cannot be completely simulated, and the final design must be completed through hardware simulation.

Ii. hardware simulation debugging:

The previous chip does not have the JTAG debugging logic. To simulate it, you must have a dedicated simulator, which is costly and has different chips. Now, this simulator does not exist.

The current chips generally have built-in JTAG debugging logic and do not need a CPU simulator. All they need is a JTAG protocol adapter (which is also called a simulator, which is actually a suitable debugger ). Therefore, the following describes JTAG and its simulation technology.

JTAG Introduction

JTAG is short for joint test action group. The organization strives to unify the chip test standards. They initially proposed the ieee1149.1 standard to the IEEE, which was later approved and standardized by the IEEE, therefore, the ieee1149.1 standard is also called the JTAG Standard, which is a set of chip test interfaces and standards. Now, almost all CPU cores implement the JTAG logical unit. JTAG was originally used to test whether the chip design is correct. Its basic principle is to place latches on each Chip Pin and connect them to form a shift register to monitor the input and output of the chip pins. Later, we found it very convenient to use JTAG to debug the chip online (in fact, it is to use JTAG to control the CPU kernel), and there is no need to design a dedicated simulation chip, so there is a popular situation of JTAG debugging.

Boundary-Scan ):

JTAG debugging is mainly based on this boundary scan technology.

The basic idea of boundary scan technology is to add a shift register unit on the input and output pins close to the chip. Because these Shift Register units are distributed across the boundaries of the chip, they are called boundary-scan register cells ). When the chip is in the debugging status, these boundary scan registers can isolate the chip from the peripheral input and output. Through these boundary scanning Register units, we can observe and control the input and output signals of chips.

Main functions of JTAG:

● Check whether the chip is good
■ This is the initial design goal of JTAG.

● Image file burning and writing
■ Compiled binary or hexadecimal executable files can be burned to the flahs chip of the target board.
■ When the Development Board is bare (no program is solidified), you usually need to download bootloader through the JTAG interface.
■ Debugging Functions
■ The JTAG interface provides a convenient way for communication and control between the host machine and the target system.

ARM7TDMI debugging architecture:

A debugging system usually contains three parts:

● Host debugging
■ A computer that runs debugging software (ads, Keil, etc.)
■ You can issue some high-level Debugging commands, set breakpoints, and access memory.

● Protocol Converter
■ Convert high-level Debugging commands issued by the debugging host into underlying arm JTAG Debugging commands
■ Debugging Objectives
■ Target chip-Based Development Board

Shows the typical debugging architecture of ARM7TDMI:

Through the Protocol converter, the debugging software running on the host can directly talk to the target chip through the JTAG interface.

To support underlying debugging, ARM7TDMI provides debugging extensions on the hardware, including:

● Stop program running
● Check and modify the Kernel Status of ARM7TDMI
● Observe and modify memory
● Resume program running

Common arm debugging tools:

● Bdi1000/2000/3000
■ Excellent debugging tools for debugging arm, MIPS, PowerPC, XScale, and other architecture Processors
■ The JTAG download speed can be uploaded to the MB or Ethernet Interface
■ Superior performance but expensive, you can debug complex code such as Linux Kernel

● U-Link
■ U-link is a tool developed by Keil for ARM and some enhanced 8051 Single-Chip Microcomputer debugging.
■ Keil's work was not encrypted, leading to piracy
■ U-link only supports Keil and JTAG download speed is 20 KB ~ 30 K
The U-link download program uses a JTAG instead of a JTAG to download a firmware program to the target board. Then, the firmware program and JTAG are used to write user code into flash to improve the speed.

● J-Link
■ J-link is a debugging tool developed by IAR for ARM chips.
■ Debugging tools supporting the RDI protocol, such as Keil, ads, and IAR
■ J-link does not support arm10 or more kernels.
■ JTAG download speed: KB ~ 500 k

● Multi-ice
■ Original debugging tools of arm, supporting a full range of ARM chips
■ JTAG download speed: Around KB

● Wigggler Cable
■ Wigggler is the most popular debugging tool in the world.
■ Very simple structure: One 74hc244 + one 9013 + several Resistors
■ Average performance, but very low price
■ Later generations have developed many debugging tools based on the wigggler hardware, such as the well-known h-JTAG

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