Avoid the soft trap of PCB fake eight-layer structure---on the laminated layer of six-layer plate



Author: Wang Huidong, a hi-tech team member

In the "Skin of the PCB," the article, we have proposed when the thickness of the plate in 1.6mm and above, how to avoid the use of false eight layer of the stack, resulting in increased PCB costs. I feel the answer is very enthusiastic ha, it seems that the problem is still more typical. Would like to intercept some of the answers put here, but the relationship between the space, you can go to an article on their own, see the article after the selection of replies.

In this article we combined with the usual design experience, put forward their own views, I hope to give you an answer, please guide to share.

What is fake eight layer

Our regular six-layer laminate, is a l2-3 core board (CORE), l4-5 (CORE) a core board, the other with PP and copper foil, and finally pressed together. As shown in Figure A.

Figure A

However, if the six-layer plate thickness at 1.6mm and above, if the conventional impedance control (single-wire 50 ohm, differential 100 ohm), on the Cascade will lead to 3, 4 layers between the thickness of more than 3 7628 semi-cured sheet thickness. Because most of the factory PP can only stack 3 sheets (more than 3 sheets of pressure, pp after the high temperature from the semi-cured state into a liquid, easily from the edge of the PNL plate loss). At this time in production usually with a light plate (no copper core plate or the conventional core plate on both sides of the copper foil etching off) added to the 3, 4 layers to assist to achieve the desired stacking thickness, which is commonly referred to as false eight layer. In fact, that is not the real eight-layer board, but to meet the needs of the board impedance, and the emergence of a special layer of the way. For example, the following figure six layer due to impedance or design limitations, the middle of a more use of a light plate, two core plate plus a light plate, this is a eight-storey folding design, actually made out is six layer effect. This is called false eight-layer board (actually six-layer plate).

Of course, this is only a false eight layer of one of the cases, as shown in the figure below, 3, 4 between the use of 2 7628 semi-cured tablets and a fake core board scheme, this practice will increase costs.

Figure II

Did you notice it.

Figure one uses two core plates (core), and the three core Board (CORE) is used in figure two, the cost is very big difference.

So how do we avoid this situation, we recommend the following several practices, please refer to the reference.

2, non-high-density when the solution

Three wiring layer Scenarios

This answer is answered: If you can achieve 3 wiring layer to complete the design, then the six-layer board can be designed to become a regular cascade. Or the number of key signal lines (high-speed signal), regional concentration, you can also use this cascade scheme, local high-speed signal region corresponding to the adjacent layer of copper, made local 3-layer wiring (L1&L4&L6). The stack is as follows (impedance calculation withheld, you can figure it out for yourself, and the back is just the same as writing cascade)

Might

disadvantage: In the case of many key signals, three layers cannot meet the cabling requirements.

Wide line width scheme

The density of the board is not high, there is no small spacing of the device, you can use a larger line width of the design of the board (such as the 8mil left and right line width) stack and impedance control as follows:

Figure Four

disadvantage: The above cascade Scheme, the impedance line design for the surface 8~9mil, inner layer 6~10mil

in the presence of small pitch devices, the above scheme is more difficult to route.

3, non-high-speed solutions

In some there is no high-speed signal, the requirements of impedance control can be slightly reduced, such as to ensure that the impedance of the same layer, but the center value of the impedance is 60~65 ohm, the difference line control at about 105 ohms, laminated and impedance control as follows:

Figure Five

disadvantage: This cascade scheme has some technical risks and needs to evaluate the reflection of high-speed signals.

(length relationship, the effect of improving the impedance scheme on the high-speed signal, will be analyzed in the following article)

4. Summary

Other options are 1, 2, 5, 6 as the wiring layer, 3, 4 for the Power floor plan, the scheme requires a very short surface trace, only fan out of the design, while 1, 2, 5, 6 between the impedance gap is great.

In addition, in the PCB design impedance is designed to be coplanar impedance, this will overlay thickness adjustment, line width increase, the line to the surrounding copper foil spacing adjustment can also achieve a non-false eight-layer solution to meet the impedance requirements and reduce costs.

Of course, everyone's reply there are other solutions: for example, to change the thickness of the plate to 1.2mm, which requires consideration of the mechanical structure requirements, in general, can not be achieved.

In fact, discerning eye will say that all of the above solutions are limited:

The signal is messy, you must have 4 wiring layers to complete the wiring
With high-density BGA, can not walk a wide line
High rate, DDR3/4, high speed serial bus, control other impedance worry about risk
......

What Mr. High-speed wants to say is: Your board is high-speed and dense, and then pay close to the eight-layer board cost, but only get six-layer board performance, you really do not know how to do it.