Basic FPGA knowledge

FPGA is short for field programmable gate array (Field Programmable Gate Array). It is a product of further development on the basis of PAL, gal, PLD, and other programmable devices, is the most integrated type in specialized Integrated Circuits (ASIC. Xillnx, an American company that launched the world's first FPGA chip in 1985. During the past two decades, the hardware architecture and software development tools of FPGA have been constantly improved and become increasingly mature. From the first 1200 available doors to several 1990s available doors in 100,000, it has grown to a single-chip FPGA chip with millions to tens of millions of doors, world-class vendors such as Xilinx and Altera have elevated FPGA device integration to a new level. FPGA combines microelectronics, circuit, and EDA technologies to enable designers to concentrate on the design of required Logic Functions, shorten the design cycle, and improve the design quality.

FPGA basic structure
FPGA companies that previously produced FPGA mainly include Xilinx, Altera, actel, lattice, and quicklogic, FPGA has many varieties and models. Although the specific structure and performance indicators of these FPGAs have their own characteristics, they generally contain three types of basic resources: programmable logic function blocks, programmable input/output blocks, and programmable interconnection resources, the basic structure 1 is shown in. Programmable Logical functional blocks are the basic units for implementing user functions. Multiple logical functional blocks are normally arranged in an array structure and distributed throughout the chip; programmable input/output blocks interface between the chip's internal logic and external pins around the logical unit array. Programmable internal interconnection resources include line segments of various lengths and some programmable connection switches, they connect various programmable logical blocks or input/output blocks to form circuits with specific functions. You can program the functions of each unit and their interconnection relationships to implement the required logical functions. FPGA of different manufacturers or different types often differs greatly in the internal structure, scale, and structure of the programmable logical block.
in addition to the three resources that constitute the basic structure of FPGA, FPGA may include the following optional resources as the process progresses and application system requirements develop:
memory resources (block ram and distributed RAM);
digital clock Management Unit (Frequency Division/frequency doubling, digital delay, clock lock );
arithmetic operation units (high-speed hardware multiplier and multiplier);
multi-level standard compatible I/O interfaces;
high-speed serial I/O interfaces;
special functional modules (hard IP cores such as Ethernet MAC);
microprocessor (IP core of hard processors such as powerpc405 ).

Query table LUT
Currently, most FPGAs use the look up table (LUT) technology, such as the acex, Apex, cyclone, Stratix series, Xilinx Spartan, and Virtex series. The most basic logical unit in these FPGAs is composed of LUT and trigger.
The query table is referred to as Lut, which is essentially a ram. Currently, FPGA uses 4-input Lut, so each LUT can be regarded as a 16x1 RAM with 4-bit address lines. After you describe a logical circuit through a schematic or HDL language, FPGA development software automatically calculates all possible results of the Logical Circuit and writes the results to ram in advance. In this way, each input signal performs a logical operation, which is equivalent to entering an address for the query, finding out the corresponding content of the address, and then outputting it.
LUT is mainly suitable for the production of SRAM processes. At present, most FPGAs are based on the SRAM process. The information will be lost when the power of the SRAM process chip is down. Therefore, a dedicated configuration chip needs to be added. When power-on, the dedicated configuration chip loads data into FPGA, and FPGA can work normally. A few FPGA products adopt the anti-melting wire or Flash technology. After power loss, the configuration information will not be lost. Therefore, this FPGA chip does not need a dedicated configuration chip.

 

FPGA programming technology
currently, there are three basic FPGA programming technologies on the market: SRAM, anti-fuse, and Flash. Among them, SRAM is the most widely used architecture so far, mainly because it is fast and can be re-programmed, and anti-fuse FPGA only has one time programmable (OTP) capability. Flash-based FPGA is a new technology in the field of FPGA, and can also provide re-programming functions. FPGA Devices Based on SRAM often bring about some other costs, including the standby batteries that enable ProMS to support secure and secure applications. FPGA Based on flash and anti-fuse does not have these hidden costs, so it can ensure a low total system cost.
SRAM-based FPGA Devices
this type of product is a reconfigurable device based on the SRAM structure. When powered on, the configuration data should be read into the on-chip SRAM, after the configuration is complete, you can enter the working status. After the power is down, the configuration data in the SRAM is lost, and the internal logic of FPGA disappears. This SRAM-based FPGA can be used repeatedly.
Anti-fuse FPGA
FPGA adopting anti-fuse programming technology has an anti-fuse array switch structure, the definition of its logic function is provided by the special programmer based on the data files designed and implemented, and the internal anti-fuse array is burned, so that the device can implement the corresponding logic function. The disadvantage of this kind of device is that it can only be programmed at one time. It has the advantage of high anti-interference and low power consumption, and is suitable for fixed products that require high reliability and high confidentiality.
flash-based FPGA
this type of FPGA device integrates the SRAM and non-volatile EEPROM storage structures. The SRAM is used to control the system while the device works normally, while the EEPROM is used to load the SRAM. Because this type of FPGA integrates the eeprom into the field programmable device based on the SRAM process, it can make full use of the non-loss characteristics of the eeprom and the reconfiguration of the SRAM. After power loss, the configuration information is stored in the On-Chip EEPROM. Therefore, the configuration chip is not needed, which helps reduce system costs and improve design security.

FPGA device selection principles
an important issue before the design of digital system logic functions is the selection of FPGA Devices, the options include vendor selection, device series, and model selection. The following describes some principles and suggestions for FPGA selection.
selection of FPGA vendors
Each FPGA vendor has its own unique core technologies and corresponding products. For the development of inherited products, try to use FPGA products that are familiar with and have been used. For the development of new products, you can follow the features and requirements of the system to be designed, and the features of various FPGA Devices to initially select FPGA vendors and product series. In addition, FPGA device manufacturers and product series can be selected based on FPGA chip costs. For example, Xilinx's Virtex series and Intel's Stratix series FPGA are high-performance products, while Xilinx's Spartan series and Intel's cyclone series are low-cost FPGA Devices.
FPGA model selection
there are many factors to consider when selecting a specific FPGA model, including the number of pins, logical resources, in-chip storage, power consumption, encapsulation, and so on. In addition, in order to ensure better scalability and scalability of the system, a certain amount of resource balance should be set aside.
FPGA peripheral device selection
after FPGA is selected, you can also choose a variety of devices based on FPGA features, such as power supply chip, off-chip memory chip, and information storage configuration. During system design and development, you should select devices with large space and pin compatibility. After the product is developed, consider replacing these peripheral devices with other compatible devices to reduce costs.

specific applications
the impact of a single-event upset (SEU) event on device reliability, it has gradually extended from space to applications with high reliability such as medical electronics. In fact, the logic connection technology of FPGA components will affect the degree of Seu immunity of components, and analyze the FPGA of flash memory, anti-fuse and SRAM, FPGA Based on the first two technologies can effectively prevent Seu problems, while sram fpga can only suppress them.
in terms of chip manufacturing technology, unlike other common sram fpga chips, actel uses a dedicated flash FPGA technology, so that its products have very distinctive features. Although 80% of FPGA in the industry is based on the SRAM Architecture, this architecture can adopt a standard SRAM process and integrate more transistors to achieve higher performance, it also develops to the 40nm process stage. However, flash FPGAs using 130nm technology are still unique in the market. FPGA with Flash architecture has greater advantages in low power consumption, security, and reliability. Because of its advantages in security and reliability, actel firmly occupies the leading position in the military and aerospace fields.